SoC Design/Integration & Synthesis Engineer

Benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Not verified checked Jun 13, 2026

Salary

$181K-$318K From the posting source checked Jun 20, 2026

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$66,396 U.S. median for this role

Projected growth (BLS Employment Projections)

+3.5% - Average

276% above the BLS role benchmark for design aggregate.

Posted salary is far from this role benchmark; treat it as low confidence.

Matched to SOC 27-1024 - Design aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Design From the posting source checked Jun 20, 2026

Seniority

Mid From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

SoC Design/Integration & Synthesis Engineer Cupertino, United States of America Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our dynamic group, you will be part of a group that defines flows and methodologies in all these fields that help Apple implement complex chips with the best QOR (quality of results) and PPA (power, performance, and area) using cutting-edge technologies. We are searching for a talented engineer to join our exciting team of problem solvers. As an SOC/ASIC Integration & Synthesis Engineer, you will have responsibilities spanning various aspects of SOC design: - Drive all front-end integration activities like Integration, Synthesis, UPF, Logical Equivalence, ECO, etc. - Work closely on methodology improvements for improving synthesis QOR. - Work on Low power design, writing UPFs, close on power intent verification at the chip level. - Work on RTL integration, timing constraints, and synthesis of designs. - Knowledge of FE flows like Lint & LEQ and scripting is a plus Work closely with other engineers that are members of the SOC Design, SOC Design Verification, Emulation, STA, Power, and Physical Design teams. Minimum Qualifications: BS degree

Read the full description at jobs.apple.com. FewerJobs shows a preview and links to the original posting.