Signal Integrity Engineer - Serial IO Interface
Apple - Austin Metro Area, United States of America
Posted Apr 20, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
-
- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified checked Jun 13, 2026
- Salary
- $120K-$210K From the posting source checked Jun 20, 2026
- 401(k) match
- Reported from DOL Form 5500 industry filing (not employer-specific)
Was this benefit information wrong? Tell us.
Market context
- U.S. role benchmark (BLS OEWS)
- $116,543 U.S. median for this role
- Projected growth (BLS Employment Projections)
- +9.8% - Much faster than average
42% above the BLS role benchmark for software engineering aggregate.
Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.
Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.
Role
Schedule
- Shift type
- Not verified
- Weekend work
- Not verified
Company
- Equity
- Offered Verified - SEC 10-K source checked Jun 20, 2026
Application
- Cover letter
- Not verified
- Assessment
- Not verified
- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Signal Integrity Engineer - Serial IO Interface Austin Metro Area, United States of America In this position, you will work with the team that develops SOCs used within Apple devices. You will be specifically responsible for high-speed serial interface signal integrity and power integrity for Apple SOCs covering the span from silicon to package to board. Prior design and modeling experience with USB, PCIe, or comparable interfaces is a must-have. Work on the electrical and physical design of high-speed serial interface systems. Work on the electrical extraction and validation of package and PCB. Work with circuit design team and vendor to optimize circuit and system design SI and PI modeling, simulation, and characterization of high-speed serial interface. Develop and execute test plans to validate signal and power integrity. Work with product engineering and system engineering to debug and improve product yield. The candidate will be responsible for all aspects of SI in high speed serdes interfaces, including power integrity if applicable. The candidate will define, influence, and implement interface specifications. The candidate will perform 3D model extractions and simulations for design optimization, verification, and validation on all relevant channel components, including silicon analog front ends, package interposers and substrates, PCBs, connectors, and cables. The candidate will drive co-design across SOCs, packages, and systems to optimize KPI in Apple products. Minimum Qualifications: Minimum requirement of a bachelors degree Preferred Qualifications: PhD in a relevant field. BS and 5+ years or MS and 3+ years of relevant industry experience. You should be
Read the full description at jobs.apple.com. FewerJobs shows a preview and links to the original posting.
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