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SerDes System Validation Engineer

Apple - Cupertino, United States of America

Posted May 1, 2026

Benefits

Parental leave
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Not verified last checked Jun 13, 2026
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401(k) match
Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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Schedule

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About this role

SerDes System Validation Engineer Cupertino, United States of America We are looking for a SerDes System Validation Engineer to lead system validation of mixed-signal SerDes IP. In this highly visible role, you will actively work within Analog-Mixed/Signal design team and participate in validation and debug of embedded circuits; collaborating with many teams to enable the world's premiere products. You will closely work with a hard-working group of Analog-Mixed/Signal designers working diligently to deliver hard IPs to Apple's products while exceeding the highest expectations of quality, innovation and efficiency. At Apple, we work every day to craft products that enrich people's lives. In doing so, we face exciting challenges driven by the increasing complexity of SoC and PHY design. If you have strong technical fundamentals and a proven record of tackling complex problems-fueled by curiosity, a passion for learning, and a desire to enhance the impact of your work-we'd love to hear from you. If you thrive on understanding the bigger picture while diving deep into the details to innovate and find elegant solutions. You enjoy collaborating with diverse teams to achieve extraordinary results, maintaining a strong team spirit even when facing tough challenges. Most importantly, you care about society and demonstrate leadership through your commitment to meaningful causes. We have an opportunity for a forward-thinking and especially hardworking system validation engineer with strong background in high-speed serial links. As a member of our dynamic team, you will have the rare and rewarding opportunity to work on upcoming products that will

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