RFIC - PLL Design Engineer

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Not verified last checked Jun 13, 2026

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401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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About this role

RFIC - PLL Design Engineer Irvine, United States of America Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. As Sr. RFIC - PLL Design Engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group with a critical impact on getting Apple's state-of-the-art wireless connectivity solutions into hundreds of millions of products. As a RFIC-PLL Designer, you are going to contribute to providing analog and digital PLL solutions for wireless SoC and driving them to mass production for Apple's Wireless Connectivity products. Design and develop analog and digital PLL building blocks: VCO, DCO, MMD, PFD, Filter, TDC and so on. Design and develop analog and digital PLL top levels. Design and develop LOGEN building blocks and top level. Work with cross-functional teams including platform architecture, wireless design, RF HW and SW to define radio features enabling wireless innovation. Work closely with RF Systems in block level and top-level specifications of the PLL, LOGEN, as well as TX and RX line ups, and proper distribution of spec margins in the chain.

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