Power Integrity Engineer

Benefits

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Not verified last checked Jun 13, 2026

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401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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About this role

Power Integrity Engineer Austin Metro Area, United States of America Do you like to work on groundbreaking technologies that enable amazing new products? Do you have the attention for details and love for precision to work towards an outstanding result? We are looking for a dedicated and passionate SoC Power Integrity Engineer to join our team in Hardware Technology Group. In this role, you will be responsible for the development, implementation, and verification of Power Integrity solutions for SoCs used in Apple devices (iPhone/iPad/Mac etc.). You will work with cross-functional teams to define off-die droop budgets, design and implement an end-to-end power delivery network (PDN) solution throughout PMU/PCB/PKG/Interposer/Die, and verify the quality of the power integrity using lab measurements. • Power delivery modeling, simulation, and characterization for die, interposer, package, board, and Voltage Regulator. • Close collaboration with multi-functional teams to design end-to-end power delivery systems for both current and future generations. • Definition of the PDN architecture and design solution space for the target system • Broad responsibility on all SoC droop related topics, including on-die inrush, off-die droop budget, PDN sign-off, noise coupling analysis, voltage guard band, active droop mitigation etc. Conduct end-to-end simulation studies including modeling of die/interposer/PKG/PCB/PMU, to meet stringent impedance and voltage droop spec. Provide implementation guidelines and feedbacks to silicon, package, system design and other cross-functional teams. Perform feasibility study for silicon floorplan, advanced droop mitigation schemes, voltage regulator modeling and tuning, system mockup design etc. Perform model to hardware correlation on component and

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