Neural Engine Performance Engineer, Platform Architecture
Apple - Cupertino, United States of America
Posted May 19, 2026
Benefits
- Parental leave
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- Non-birth-parent leave
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- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
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- Relocation assistance
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- Childcare support
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- Learning budget
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- Verification
- Not verified last checked Jun 13, 2026
- Salary
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- 401(k) match
- Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.
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Schedule
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- Weekend work
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Application
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- Assessment
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- Deadline
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Where they hire
State eligibility is not yet verified.
About this role
Neural Engine Performance Engineer, Platform Architecture Cupertino, United States of America At Apple, Platform Architecture is responsible for connecting our hardware and software into one unified system. Join this team, and you'll collaborate with engineers across Apple to design how all of our technologies work in unison. In this role, you will be part of the Neural Engine IP architecture team and work to improve the performance of the Neural Engine IP through SW optimizations and HW architectural enhancements. As a Neural Engine Performance Engineer, you will be responsible for analyzing, debugging and optimizing the performance of the Neural Engine. Prototyping performant and flexible programming models for the Neural Engine. Defining and implementing performance studies to identify performance bottlenecks in the Neural Engine HW and SW. Developing and maintaining tools for performance profiling. Minimum Qualifications: BS degree Experience with C++ and Python Experience with performance profiling of HW or SW Experience in at least one hardware IP: ML HW accelerators or processing units such as GPUs, ISPs, Video CODECs, CPUs, or similar Preferred Qualifications: MS or PhD degree 3+ years of software experience Experience writing low level software interfaces to hardware Experience debugging complex system level performance issues Experience writing automation software for data collection and analysis Understanding of OS scheduling and memory management Understanding of ML workloads and deployment for inference Understanding of SoC cache hierarchy and its performance implications
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