Memory Packaging Engineer

Benefits

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401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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About this role

Memory Packaging Engineer Santa Clara, United States of America Join the team at the heart of memory innovation for every Apple product. As a Memory Packaging Engineer, you will architect the memory solutions that power the industry-leading performance of Apple's hardware. We push the boundaries of bandwidth density, power efficiency, and system integration through meticulous co-design between memory technology and our world-class systems. If you are driven to solve the industry's toughest packaging challenges, your work will have a profound and lasting impact on the products used by millions. In this role, you will drive the definition, development, and qualification of next-generation memory packages critical to Apple's future products. You will guide the package roadmaps of our memory partners and collaborate with internal engineering teams to enable bandwidth and density scaling. Your ownership will span the entire product lifecycle, from initial concept through qualification. Determine the direction of next-generation package architecture by evaluating available and emerging packaging technologies. Collaborate with cross-functional teams to solve integration challenges, including electrical, mechanical, and thermal. Drive vendor DOEs and failure analysis to improve downstream yield and maintain world-class quality and reliability. Define the memory package POR (plan of record): Package form factor, process, layout, stackup, and bill of materials (BOM). Drive memory vendors to develop package materials and technology for leading-edge package design rules. Minimum Qualifications: Minimum requirement of a bachelor's degree in a relevant field Preferred Qualifications: MS or PhD preferred, with 3+ years of industry experience in package design and assembly process

Read the full description at jobs.apple.com. FewerJobs shows a source-linked preview and links to the original posting.