DDR Mixed-Signal Circuit Design Engineer
Apple - San Francisco Bay Area, United States of America
Posted May 18, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
-
- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified last checked Jun 13, 2026
- Salary
- $120K-$210K not verified - source not recorded; timestamp not recorded
- 401(k) match
- Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.
Was this benefit information wrong? Tell us.
Market context
- U.S. role benchmark (BLS OEWS)
- $111,944 U.S. median for this role
- Projected growth (BLS Employment Projections)
- +13.7% - Much faster than average
48% above the BLS role benchmark for data and ml aggregate.
Matched to SOC 15-1252 - Data and ML aggregate by role bucket.
Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.
Schedule
- Shift type
- Not verified
- Weekend work
- Not verified
Application
- Cover letter
- Not verified
- Assessment
- Not verified
- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
DDR Mixed-Signal Circuit Design Engineer San Francisco Bay Area, United States of America At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet? We have an opportunity for a detailed and extraordinarily hardworking PHY Analog/Mixed-Signal Circuit Designer. As a member of our multifaceted group, you will have the unique and great opportunity to shape upcoming products that will delight and inspire millions of Apple's customers every day! In this role, we are the center of a PHY design effort collaborating with Platform Architecture, Logic Designers, SIPI, Layout, DV and Timing Teams, with a critical impact on delivering best in class PHY designs. You will be required to do transistor level Analog/Mixed-Signal Circuit Designs, working with Layout Teams on the physical implementation of industry leading PHY designs. The ideal candidate will have significant experience in Analog/Mixed-Signal Circuit Design. As an Analog/Mixed-Signal Circuit Design Engineer, you will be involved with all phases of high-performance PHY designs from architectural concept to delivery of our final GDS. Created detailed specifications for analog / mixed signal IP Design analog / mixed signal IP from the high level concept to the transistor level, delivering the final GDS and required collaterals Supervise Layout Designers as they create the IP GDS Run pre silicon verification flows to ensure the design's robustness Characterize the silicon and debug as needed Minimum Qualifications: BS in Electrical Engineering Preferred Qualifications: Proven understanding of all aspects of
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