CPU Silicon Validation Engineer
Apple - Santa Clara, United States of America
Posted Apr 14, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified last checked Jun 13, 2026
- Salary
- Not verified not verified - source not recorded; timestamp not recorded
- 401(k) match
- Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.
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Schedule
- Shift type
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- Weekend work
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Application
- Cover letter
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- Assessment
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- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
CPU Silicon Validation Engineer Santa Clara, United States of America Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! In this role, you will be at the center of a chip design effort that collaborates with many disciplines and has a critical impact on getting functional products to millions of customers. You will be part of a team responsible for the functional validation of our CPUs, with the aim of identifying logic design and circuit bugs. You will be developing CPU test content using our test generators, defining new test cases for our cutting-edge CPU designs, and spearheading our silicon bring-up efforts. • Work closely with CPU RTL and DV teams to understand changes to our CPU designs and to engineer test content for new CPU features • Create CPU validation test plans, ensuring all key features are covered • Develop SW workloads to stress test the CPU and integrate these into our existing validation environments • Help maintain and improve our random test generator by adding support for new CPU architectural and microarchitectural features • Drive the bring-up
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