FewerJobs.
All jobs

CPU Physical Design and Integration Engineer

Apple - Santa Clara, United States of America

Posted May 4, 2026

Benefits

Parental leave
Not verified
Non-birth-parent leave
Not verified
Family-building benefits
  • Fertility benefits: Not verified
  • Adoption assistance: Not verified
  • Surrogacy assistance: Not verified
Mental health support
Not verified
Relocation assistance
Not verified
Childcare support
Not verified
Learning budget
Not verified
Verification
Not verified last checked Jun 13, 2026
Salary
Not verified not verified - source not recorded; timestamp not recorded
401(k) match
Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

Was this benefit information wrong? Tell us.

Schedule

Shift type
Not verified
Weekend work
Not verified

Application

Cover letter
Not verified
Assessment
Not verified
Deadline
Not stated

Where they hire

State eligibility is not yet verified.

About this role

CPU Physical Design and Integration Engineer Santa Clara, United States of America Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, thoughtful people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! In this highly visible role, you will be at the center of a processor design effort collaborating across domains, with a critical impact on getting functional products to millions of customers quickly. As a CPU Physical Design and Integration Engineer, you will be participating in the physical design, integration, and verification of high performance, low power processor development. • Block partitioning and pin placements • Own chip level place and route (PnR), final CPU layout database construction, and verification (PDV) • Work with the Implementation/CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with the SOC team to meet IP technical and delivery requirements • Participate in flow development for chip integration and analysis • Scripting to automate tasks and improve debug efficiency

Read the full description at jobs.apple.com. FewerJobs shows a source-linked preview and links to the original posting.

Apply at jobs.apple.com

Apply link not verified; last-live date unavailable.

What verified means

Verified means a displayed claim has a recorded source field, a source URL when available, and a timestamp showing when FewerJobs checked or enriched the evidence.

Related jobs