Cellular ASIC Design Engineer – Protocols

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Not verified last checked Jun 13, 2026

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401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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About this role

Cellular ASIC Design Engineer – Protocols San Francisco Bay Area, United States of America Apple is where individual imaginations gather together, committing to the values that lead to great work. Every new product we build, service we create, or Apple Store experience we deliver is the result of us making each other's ideas stronger. That happens because every one of us shares a belief that we can make something wonderful and share it with the world, changing lives for the better. It's the diversity of our people and their thinking that inspires the innovation that runs through everything we do. When we bring everybody in, we can do the best work of our lives. Here, you'll do more than join something - you'll add something. We're looking for a Cellular ASIC Design Engineer, where you will architect and implement protocol processing hardware for next-generation wireless SoCs. You will own the full lifecycle from early architectural exploration and HW/SW partitioning, through RTL implementation, to silicon bring-up and lab validation. You will collaborate closely with software, firmware and verification teams to deliver hardware that balances performance, flexibility, and power efficiency. Micro-architecture and RTL implementation for cellular protocol hardware. Analyze and optimize pipelining architectures to improve performance metrics. Drive latency optimization and quality of service (QoS) support. Define HW/FW/SW partitioning for protocol processing functions. Develop architectural prototypes to validate design decisions early. Bring up and debug hardware in the lab. Minimum Qualifications: Minimum requirement of a bachelors degree. Hands-on experience in SystemVerilog and

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