ASIC Power Engineer

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Not verified last checked Jun 13, 2026

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401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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About this role

ASIC Power Engineer Los Angeles Metro Area, United States of America Would you like to join Apple's growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy-efficient / low-power design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering teams. In this highly visible role, you will be at the center of low-power architecture, power modeling and correlation efforts with a critical impact on getting functional products to hundreds of millions of customers quickly. You will work on power modeling, analysis and correlation tasks for wireless communication SoCs. Will you join us and do the best work of your life here? Define power-efficient SOC architecture and schemes, write power spec. Estimate pre-silicon power, build wireless application and atomic power model with high accuracy. Define and generate power vectors with Design and DV support. Collect pre-silicon power data using power flow and tools. Analyze and identify power reductions. Support post-silicon power correlation. Minimum Qualifications: BS and 10+ years of relevant experience. ASIC power knowledge. Experience with Power tools, e.g. PTPX and Power Artist. Understand ASIC logic design. Knowledge of low power design and UPF. Proficiency in scripting languages (Shell, Perl or Python). Basic knowledge on common SOC components, e.g. CPU, fabric, peripherals and PCIe. Strong problem solving and analytical skills. Preferred Qualifications: Pre-silicon power estimation experience. Pre-silicon Power modeling experience. Actual low

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