ASIC Design Engineer - Pixel IP DMA

Benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Not verified last checked Jun 13, 2026

Salary

Not verified not verified - source not recorded; timestamp not recorded

401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

Was this benefit information wrong? Tell us.

Schedule

Shift type

Not verified

Weekend work

Not verified

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

ASIC Design Engineer - Pixel IP DMA Sunnyvale, United States of America Do you love creating sophisticated solutions to highly complex challenges? As part of our Hardware Technologies group, you'll help design our next-generation, high-performance, power-efficient system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, we will enable our customers to do all the things they love with their devices! In this highly visible role, you will be at the center of the Pixel IP design effort in pixel processing. You will collaborate with all teams, making a critical impact getting functional products to millions of customers quickly. As a Pixel IP DMA Design Engineer in the Pixel IP team, you will work closely with architecture, design, and verification teams to build high performance and low power DMA engines that coordinate moving large amounts of data between the memory system and the Pixel IP Engine. In this front-end design role, your tasks will include: - Exploring solutions to enhance performance while minimizing power and area - Detailing specifications and building RTL designs - Working with design verification and formal verification teams to verify functionality and performance Minimum Qualifications: Bachelors Degree + 10 years of experience Preferred Qualifications: Experience in multimedia IP/SoC front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal communication skills Experience working multi-functionally with

Read the full description at jobs.apple.com. FewerJobs shows a source-linked preview and links to the original posting.