Advanced Package Development Engineer
Apple - San Francisco Bay Area, United States of America
Posted Feb 4, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
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- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
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- Relocation assistance
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- Childcare support
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- Learning budget
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- Verification
- Not verified last checked Jun 13, 2026
- Salary
- Not verified not verified - source not recorded; timestamp not recorded
- 401(k) match
- Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.
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Schedule
- Shift type
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- Weekend work
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Application
- Cover letter
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- Assessment
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- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Advanced Package Development Engineer San Francisco Bay Area, United States of America Join the team behind the technology in a billion pockets worldwide. Apple's Advanced Packaging Program is seeking engineers to drive package integration and technology development for next-generation products. In this role, you'll contribute to the advanced packaging technologies that enable Apple's industry-leading silicon performance. You'll work alongside world-class engineers to solve complex integration challenges and bring new packaging innovations from concept to mass production. Developing advanced packaging technologies in a cross-functional team. You will be responsible for Package integration and technology development. We're looking for someone who: • Has deep expertise in semiconductor packaging or related disciplines • Thrives on solving difficult technical problems • Holds themselves to a high standard of engineering excellence • Is self-motivated and comfortable navigating ambiguity Develop and qualify advanced packaging technologies including substrate design, interconnect architectures, and assembly processes to meet performance, power, and form factor requirements for next-generation products. Drive package integration across silicon, firmware, and system teams to ensure co-optimization of die architecture, package design, and thermal/mechanical constraints. Lead characterization and failure analysis efforts to identify root causes of reliability or performance issues and implement corrective actions. Partner with external suppliers and foundries to evaluate new materials and processes, establish specifications, and enable technology transfer to high-volume manufacturing. Define and execute test vehicles and experiments to validate packaging concepts, establish design rules, and generate data for product design decisions. Minimum Qualifications: BS and 10+ years of experience in relevant industry
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