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Applied AI/ML Scientist
Cerebras Systems - UAEIndexed from Greenhouse Benefit evidence checked Jun 7, 2026posted 260 days agoWhy we showed this
Description: "intel"Role: semantic matchUnspecified Data From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reportedApplied AI/ML Scientist UAE Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About The Role As an Applied AI Scientist in the FieldML team, you will be responsible for developing and customizing large language models and more broadly large-scale deep learning models to solve specific customer problems. You won't just advise; you will build. You will bridge the gap between state-of-the-art research and real-world applications by helping customers harness the power of the Cerebras Wafer-Scale Engine (WSE) for their AI initiatives. We are looking for experienced AI Scientists who are passionate about the "applied" side of machine learning - those
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Network Engineer
Cerebras Systems - Sunnyvale, CA; Toronto, Ontario, CanadaIndexed from Greenhouse Benefit evidence checked Jun 7, 2026posted 120 days agoWhy we showed this
Description: "intel"Role: semantic matchUnspecified Engineering From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reportedNetwork Engineer Sunnyvale, CA; Toronto, Ontario, Canada Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About The Role We are looking for a Network Architect to join our Cluster Engineering Team and help shape the front-end datacenter and interconnect fabric for the current and next generations of our AI clusters. You will partner closely with hardware vendors, internal networking teams, and industry peers to define best-in-class network architectures that deliver resilient, reliable, and high-throughput connectivity for large-scale AI workloads. This is a deeply technical role that spans the full stack, from host-side networking and NIC behavior up through cluster-level coordination
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Device Driver validation Engineer
Intel - India, BangaloreIndexed from Workday Benefit evidence checked Jun 13, 2026posted 123 days agoWhy we showed this
Employer: "intel"Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedDevice Driver validation Engineer India, Bangalore posted: Posted 11 Days Ago
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Analytical Chemistry Lab Technician
Intel - US, Oregon, HillsboroIndexed from Workday Benefit evidence checked Jun 13, 2026posted 112 days agoWhy we showed this
Employer: "intel"Unspecified Engineering From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedAnalytical Chemistry Lab Technician US, Oregon, Hillsboro posted: Posted Today
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Senior CPU Core Physical Design Engineer
Intel - US, California, FolsomIndexed from Workday Benefit evidence checked Jun 13, 2026posted 143 days agoWhy we showed this
Employer: "intel"Role: semantic matchUnspecified Data From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedSenior CPU Core Physical Design Engineer US, California, Folsom posted: Posted 30+ Days Ago
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Staff Software Engineer, Inference Cloud
Cerebras Systems - Sunnyvale, CAIndexed from Greenhouse Benefit evidence checked Jun 7, 2026posted 812 days agoWhy we showed this
Description: "intel"Role: semantic matchUnspecified Engineering From the posting source - Staff Plus From the posting source Salary not disclosed Inferred from posting 401(k) reportedStaff Software Engineer, Inference Cloud Sunnyvale, CA Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. Location: Sunnyvale We're hiring a Staff Engineer to own major areas of the architecture of our Inference Cloud Platform. This team owns the cloud layer behind our Inference Service, with responsibility for availability, latency, reliability, and global scale. This is a hands on IC role for an engineer who wants to work on the hardest distributed systems problems in the stack: multi-region traffic architecture, graceful degradation under bursty AI workloads, performance at high QPS, and the operating model for a platform that has to stay
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Deep Learning Performance Architect
NVIDIA Corporation - 2 LocationsIndexed from Workday Benefit evidence checked Jun 13, 2026posted 133 days agoWhy we showed this
Role: semantic matchUnspecified Engineering From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedDeep Learning Performance Architect 2 Locations posted: Posted 21 Days Ago
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Standard Cell Library Engineer
Intel - 2 LocationsIndexed from Workday Benefit evidence checked Jun 13, 2026posted 127 days agoWhy we showed this
Employer: "intel"Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedStandard Cell Library Engineer 2 Locations posted: Posted 15 Days Ago
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Senior Solutions Architect - Deep Learning
NVIDIA Corporation - Israel, Tel AvivIndexed from Workday Benefit evidence checked Jun 13, 2026posted 143 days agoWhy we showed this
Role: semantic matchUnspecified Engineering From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedSenior Solutions Architect - Deep Learning Israel, Tel Aviv posted: Posted 30+ Days Ago
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GPU Software Architecture Engineer, Graphics, Games, & ML
Apple - Cupertino, United States of AmericaIndexed from Apple Custom Benefit evidence checked Jun 13, 2026 Comp disclosed in postingposted 188 days agoWhy we showed this
Description: "intel"Role: semantic matchUnspecified Engineering From the posting source - Senior From the posting source $181K-$318K From the posting source Equity Inferred from posting 401(k) reportedGPU Software Architecture Engineer, Graphics, Games, & ML Cupertino, United States of America Apple Silicon GPU SW architecture team within the Media, Graphics & Compute Technologies group is seeking a senior/principal engineer to lead server-side ML acceleration and multi-node distribution initiatives. You will help define and shape our future GPU compute infrastructure on Private Cloud Compute that enables Apple Intelligence. In this role, you'll be at the forefront of architecting and building our next-generation distributed ML infrastructure, where you'll tackle the complex challenge of orchestrating massive network models across server clusters to power Apple Intelligence at unprecedented scale. It will involve designing sophisticated parallelization strategies that split models across many GPUs, optimizing every layer of the stack-from low-level memory access patterns to high-level distributed algorithms-to achieve maximum hardware utilization while minimizing latency for real-time user experiences. You'll work at the intersection of cutting-edge ML systems and hardware acceleration, collaborating directly with silicon architects to influence future GPU designs based on your deep understanding of inference workload characteristics, while simultaneously building the production systems that will serve billions of requests daily. This is a hands-on technical leadership position where you'll not only architect these systems but also dive deep into performance profiling, implement novel optimization techniques, and solve unprecedented scaling challenges as you help define the future of AI experiences delivered through Apple's secure cloud infrastructure. Design and implement tensor/data/expert parallelism strategies for large language model inference across distributed server cluster environments Drive hardware and software roadmap decisions for ML acceleration
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Software Application Development Engineer
Intel - 2 LocationsIndexed from Workday Benefit evidence checked Jun 13, 2026posted 143 days agoWhy we showed this
Employer: "intel"Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedSoftware Application Development Engineer 2 Locations posted: Posted 30+ Days Ago
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Benefits
Advanced Micro Devices - Location not specifiedIndexed from Custom Benefit evidence checked Jun 13, 2026posted 120 days agoWhy we showed this
Description: "intel"Role: semantic matchUnspecified Other - Mid From the posting source Salary not disclosed Inferred from posting Surrogacy assistance Inferred from posting Learning budget Equity Inferred from posting 401(k) reportedBenefits AMD Employee Benefits and Total Rewards Skip to main content AMD Website Accessibility Statement Products Processors Accelerators Graphics Adaptive SoCs, FPGAs, & SOMs Software, Tools, & Apps Processors Server CPUs EPYC CPU Portfolio Data Center, Cloud & AI Small Business & Hosting Server CPU Specifications Business Systems Ryzen PRO Laptops Ryzen PRO Desktops Workstations PRO Technologies Ryzen AI for Business Personal & Gaming Ryzen Laptops Ryzen Desktops Advantage Gaming Laptops Advantage Gaming Desktops Ryzen Z Series Handhelds Ryzen AI for Consumer Embedded EPYC and Ryzen Partner Ecosystem Resources Product Specifications Enterprise Blogs & Insights Accelerators GPU Accelerators Instinct GPUs Documentation Cloud Graphics Adaptive Accelerators Alveo Data Center Accelerator Cards Telco Accelerator Cards DPU Accelerators Pensando Salina Ethernet Adapters Pensando Pollara 400 Alveo X3 Series Solarflare Adapters Graphics Workstations Radeon PRO Desktops AMD Advantage Premium Radeon RX Laptops AMD Advantage Premium Radeon Mobile Graphics Resources Product Specifications Documentation Adaptive SoCs, FPGAs, & SOMs Adaptive SoCs & FPGAs Versal Portfolio SoC Portfolio FPGA Portfolio Cost-Optimized Portfolio System-on-Modules (SOMs) SOM Overview Kria SOMs KD240 Drives Starter Kit KV260 Vision AI Starter Kit KR260 Robotics Starter Kit Technologies AI Engine Design Security Digital Signal Processing Functional Safety High Speed Serial Memory Solutions Power Efficiency Resources Intellectual Property Design Hubs Developer Hub Customer Training Evaluation Boards & Kits Evaluation Boards Boards & Kits Accessories Software, Tools, & Apps Processor Tools Ryzen Master Overclocking Utility PRO Technologies StoreMI Ryzen AI Software Zen Software Studio Graphics Tools & Apps AMD Software: Adrenalin Edition AMD Software: PRO
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Technical Sales Graduate Intern
Intel - PRC, BeijingIndexed from Workday Benefit evidence checked Jun 13, 2026posted 143 days agoWhy we showed this
Employer: "intel"Unspecified Engineering From the posting source - Entry From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedTechnical Sales Graduate Intern PRC, Beijing posted: Posted 30+ Days Ago
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Hardware Engineer (IoT)
Ubiquiti - TaipeiIndexed from Greenhouse Benefit evidence checked Jun 7, 2026posted 135 days agoWhy we showed this
Role: semantic matchUnspecified Engineering From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedHardware Engineer (IoT) Taipei About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you'll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Role Summary We are looking for a hands-on Senior Hardware Engineer to lead the design and mass production of our battery-powered IoT product lines. This role will drive board-level design, low-power optimization, and EMS/ODM coordination, partner with cross-functional teams on NPI and certification, and help bring our next generation of USL/UC products to market. Responsibilities (What he/she will do after joining UI) - Lead the hardware design of battery-powered portable products and IoT lighting / control devices from concept through mass production. - Define power architecture and conduct battery life estimation for primary lithium (CR series) and rechargeable Li-ion applications. - Drive low-power optimization through µA-level current measurement, sleep / wake-up strategy design, and power budget planning. - Design and review PMIC, charger IC, and battery protection circuits to ensure product safety and reliability. - Integrate wireless connectivity solutions (BLE, Zigbee, Wi-Fi, or Sub-GHz) into product designs, including
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RF Hardware Design Engineer
Intel - 2 LocationsIndexed from Workday Benefit evidence checked Jun 13, 2026posted 120 days agoWhy we showed this
Employer: "intel"Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedRF Hardware Design Engineer 2 Locations posted: Posted 8 Days Ago
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ML Software Tool Development Engineer
Cerebras Systems - Sunnyvale CA or Toronto CanadaIndexed from Greenhouse Benefit evidence checked Jun 7, 2026posted 227 days agoWhy we showed this
Description: "intel"Role: semantic matchUnspecified Engineering From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reportedML Software Tool Development Engineer Sunnyvale CA or Toronto Canada Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. Responsibilities: - Lead the design and implementation of system-level debugging, validation, and observability platforms. - Develop automated systems for collecting and analyzing numerical, and execution anomalies. - Create visualization and analysis tools to enable efficient root-cause investigation. - Build frameworks for failure classification, regression detection, and anomaly monitoring. - Extend compilers, runtimes, and programming interfaces to support advanced profiling and instrumentation. - Improve system bring-up, low-level debug, and validation workflows. - Partner cross-functionally with compiler, hardware, firmware, runtime, and infrastructure teams. -
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CPU–SoC Mask Layout Designer (Diploma Level Contract role) - Silicon Engineering Group (SiG)
Intel - 2 LocationsIndexed from Workday Benefit evidence checked Jun 13, 2026posted 143 days agoWhy we showed this
Employer: "intel"Role: semantic matchUnspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedCPU–SoC Mask Layout Designer (Diploma Level Contract role) - Silicon Engineering Group (SiG) 2 Locations posted: Posted 30+ Days Ago
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CPU Performance Developer Technology Engineer
NVIDIA Corporation - 3 LocationsIndexed from Workday Benefit evidence checked Jun 13, 2026posted 114 days agoWhy we showed this
Role: semantic matchUnspecified Engineering From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedCPU Performance Developer Technology Engineer 3 Locations posted: Posted 2 Days Ago
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Mask Manufacturing Technician
Intel - US, Oregon, HillsboroIndexed from Workday Benefit evidence checked Jun 13, 2026posted 123 days agoWhy we showed this
Employer: "intel"Unspecified Engineering From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedMask Manufacturing Technician US, Oregon, Hillsboro posted: Posted 11 Days Ago
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PERC ESD EDA Engineer
Intel - 4 LocationsIndexed from Workday Benefit evidence checked Jun 13, 2026posted 114 days agoWhy we showed this
Employer: "intel"Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedPERC ESD EDA Engineer 4 Locations posted: Posted 2 Days Ago
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Senior CPU Physical Design Engineer
Intel - US, Texas, AustinIndexed from Workday Benefit evidence checked Jun 13, 2026posted 143 days agoWhy we showed this
Employer: "intel"Role: semantic matchUnspecified Data From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedSenior CPU Physical Design Engineer US, Texas, Austin posted: Posted 30+ Days Ago
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Staff/Sr. ML Compute Efficiency Engineer
Apple - Santa Clara, United States of AmericaIndexed from Apple Custom Benefit evidence checked Jun 13, 2026 Comp disclosed in postingposted 251 days agoWhy we showed this
Role: semantic matchUnspecified Engineering From the posting source - Staff Plus From the posting source $181K-$318K From the posting source Equity Inferred from posting 401(k) reportedStaff/Sr. ML Compute Efficiency Engineer Santa Clara, United States of America Scaling machine learning workloads across thousands of GPUs and TPUs creates challenges that few engineers ever encounter. In Apple's Machine Learning Platform Technologies organization, we build the infrastructure that powers large-scale ML training and inference workloads, bringing together expertise in distributed systems, machine learning infrastructure, and high-performance computing. As a performance engineer in the ML Compute Efficiency team, you'll tackle ambiguous systems challenges, identify inefficiencies and build solutions that maximize accelerator utilization, reduce idle and fragmented capacity, and minimize recovery periods. This includes analyzing accelerator performance, digging into various parallelism techniques, and refining workload scheduling and orchestration across the compute fleet. Characterize ML workload behavior through profiling, benchmarks and metrics. Dive into unfamiliar codebases to prototype changes, evaluate tradeoffs, and build production-ready solutions. Design systems for efficient recovery from failures and preemptions. Create tools to identify and alert bottlenecks across applications and frameworks. Use workload-driven insights to influence next-generation hardware selection and procurement decisions. Collaborate closely with ML researchers and infrastructure engineers to address inefficiencies. Drive impact through hands-on contribution and mentorship. Minimum Qualifications: Experience with large-scale distributed systems for AI/ML workloads running on GPUs or TPUs. Strong software engineering skills with experience developing and optimizing training frameworks (e.g. PyTorch, JAX) using C/C++ or Python. Experience working on cross-functional projects with ML research and infrastructure teams. Familiarity with model architectures and various training techniques. Bachelor's degree in Computer Science or equivalent experience, with 7+ years of industry experience. Preferred
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Business Intel Engineer, GO-AI
Amazon - Hyderabad, Telangana, INDIndexed from Amazon Custom Benefit evidence checked Jun 7, 2026posted 147 days agoWhy we showed this
Title: "intel"Role: semantic matchUnspecified Engineering From the posting source - Mid From the posting source Resolvable source Verified parental leave: 6 wksource Inferred from posting Verified non-birth-parent leave: 6 wk Salary not disclosed Inferred from posting Adoption assistance Inferred from posting Childcare support Inferred from posting Fertility benefits Inferred from posting Mental health support Equity Inferred from posting 401(k) reportedBusiness Intel Engineer, GO-AI Hyderabad, Telangana, IND Amazon Robotics is at the forefront of applying state-of-the-art artificial intelligence to solve real-world challenges at unprecedented scale. Our fulfillment centers handle more individual items than any company in the world, combining computer vision, mobile robots, advanced end-of-arm tooling, and high-degree of freedom movement with state-of-the-art AI. We collaborate with customers across Amazon worldwide to conceive, develop, prototype, and deploy intelligent robotic systems that push the boundaries of industrial automation. Within Amazon Robotics, the Global Operations - Artificial Intelligence (GO-AI) team enables Amazon to accelerate and scale the next generation of AI-powered robotic solutions. We're transforming how complex visual reasoning tasks are performed across Amazon's robotics operations, moving from traditional manual data annotation processes to state-of-the-art foundation model solutions. As a Business Intelligence Engineer on GO-AI's Technology & Development Team, you'll work with cross-functional teams (Science, Software, Data, BIE) managing massive-scale, proprietary datasets to develop foundation models that achieve human-level performance on complex real-world tasks. Your work will directly impact millions of daily operations across Amazon's global fulfillment network. This is a rare opportunity to work with a team building AI systems that operate at Amazon scale while solving novel technical challenges in computer vision, natural language processing, and human-AI collaboration. You'll collaborate with world-class scientists, engineers, and operations teams to deploy state-of-the-art research into production systems that deliver real-world impact at global scale. Key job responsibilities • Support leadership decision-making by deep-diving into business hypotheses and anecdotes. • Design and automate ETL
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Strategic Hardware Partnerships
OpenAI - San Francisco, California, United StatesIndexed from Ashby Benefit evidence checked Jun 7, 2026posted 120 days agoWhy we showed this
Role: semantic matchUnspecified Sales From the posting source - Senior From the posting source Salary not disclosed Inferred from posting 401(k) reportedStrategic Hardware Partnerships San Francisco, California, United States About the Role We are a small, fast-moving partnerships team that shapes and executes OpenAI's most strategic collaborations. In this role, you will own the end-to-end hardware partnership strategy and portfolio spanning silicon, systems, and manufacturing partners that make our product roadmap real. You will build deep relationships, set and ensure we have the right joint strategy and programs in place, lead cross-functional workstreams, and iterate on complex deals to break new ground and advance OpenAI's most ambitious hardware programs. You are a seasoned leader with deep experience in complex hardware ecosystems, comfortable operating amid ambiguity, and capable of driving alignment across executives, boards, and partners while simultaneously pushing critical programs to delivery. You have a background working closely with product and engineering leaders and expertise in strategic hardware and systems supply deals. You're able to drive work at high velocity and can motivate external and internal partners including product, engineering, sales, finance, legal and operations. Key Responsibilities: - Own strategic hardware partner relationships end-to-end. Be the primary point of contact internally and externally for OpenAI's most important strategic hardware partners. - Define and drive joint strategy and roadmap alignment. Translate product and engineering priorities into partner roadmaps, milestones, and decision points (requirements, capacity, cost targets, reliability, and timelines). - Technical diligence and partner strategy. Evaluate build/buy/partner options, understand where advantages/risks sit, and provide clear recommendations grounded in technical and business analysis (silicon, connectivity, systems, device HW/SW stack, OS, etc.). - Structure
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