Intel jobs

Supply Chain Engineer (SCE) PRC, Chengdu posted: Posted 29 Days Ago

Senior ML Software Engineer - Integration & Quality Sunnyvale CA or Toronto Canada Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About the Role We are looking for a Software Engineer to join the ML Integration and Quality team at Cerebras. This team sits at the intersection of machine learning infrastructure, distributed systems, and hardware/software co-design. In this role, you will help integrate and validate the software stack that powers the Cerebras AI platform, ensuring large-scale ML workloads run reliably and efficiently across our systems. You will work closely with engineers across runtime, compiler, kernel, and hardware teams to debug

Senior CPU Design Verification Engineer, Silicon Mountain View, CA, USA; +3 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $163000 - $237000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Verify designs using verification techniques and methodologies. Work cross-functionally to debug failures and verify the functional correctness of the design. Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use. Perform design verification for future CPU developments. Perform functional verification and performance validation for both pre-silicon. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 5 years of experience in verification methodologies and languages such as Universal Verification Methodology (UVM) and SystemVerilog. Preferred qualifications: Master's degree or Phd in Electrical

Staff/Senior Staff/Principal Engineer Chip Verification Bangalore (India)

Physical Design Methodology Engineer 5 Locations posted: Posted 2 Days Ago

Senior Chip Design Verification Engineer, Port IP Group Israel, Tel Aviv posted: Posted 11 Days Ago

SoC/IP Design Verification Engineer India, Bangalore posted: Posted 30+ Days Ago

Cloud Application Development Engineer India, Bangalore posted: Posted 30+ Days Ago

Senior Physical Design Engineer STA India, Bangalore posted: Posted Today

Interconnect Hardware Engineer Israel, Yokneam posted: Posted 11 Days Ago

AI Chip Design Engineer - New College Grad 2026 US, CA, Santa Clara posted: Posted 30+ Days Ago

ADCE Packaging Design Architect 9 Locations posted: Posted 3 Days Ago

CPU Design Integration Engineer, Google Cloud Haifa, Israel; +1 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. The ML, Systems, and Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world. We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud's Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers. Define and implement solutions for design, integration and verification problems using in-house and external technical solutions or tools. Involve in project development and convergence with the highest quality, agreement with issues as they arise through design and implementation, or equivalent relevant experience. Connect between RTL design, physical design, DFT, external IPs and SoC while maintaining project priorities. Maintain project infrastructure and stability. Ensure chip quality by implementing best practices and implementing quality control measures. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, a related field, or equivalent practical

Window infrastructure & DevOps Student Israel, Haifa posted: Posted 30+ Days Ago

Senior ML Systems Engineer Sunnyvale CA or Toronto Canada Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About the Role We are seeking a versatile and experienced engineer to join our SOTA Training Platform team. This team is responsible to rapidly bring up state-of-the-art open-source models (like LLaMA, Qwen, etc) or customer-provided proprietary models on our Cerebras CSX systems. Success in this role requires a system-minded generalist who thrives in fast-paced bringup environments and is comfortable working across the entire Cerebras software stack. Your work will play a critical role in achieving unprecedented levels of performance, efficiency, and scalability for

Load Balancer Network Engineer 2 Locations posted: Posted 20 Days Ago

GPU Power Efficiency Engineer Austin, United States of America Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC)! You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Join us to help deliver the next groundbreaking product containing an Apple designed GPU! In this highly impactful role, you will be responsible for Efficiency or Performance per watt projections for the GPU from early feature specification stages to Silicon. As a member of the Silicon Technologies GPU team, you will work across functions including Architecture, Power, Performance, Silicon Validation, Thermals and Technology. The job involves analyzing and influencing key factors effecting Performance and Power of the GPU and improving on methodologies to align the model to Silicon. - Responsible to generate and analyze GPU Efficiency Projections - Performance versus Power , for each generation of GPU over the full cycle of the project, from Concept to Silicon. - Drive the methodology of generating projections and Efficiency curves to improve accuracy and quality. - Collaborate with architecture team to set power targets and determine the impact of features on efficiency. - Work with Performance and Power teams to gather data for the Efficiency curves and analyze the impact. - Work with the Silicon team to improve

Deep Learning Performance Architect 2 Locations posted: Posted 2 Days Ago

Quality Operations Manager (QOM) 2 Locations posted: Posted 4 Days Ago

Security Software Development Engineer Poland, Gdansk posted: Posted 7 Days Ago

ML Microarchitect Mountain View, California Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver-The World's Most Experienced Driver™-to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo's fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms. This role follows a hybrid work schedule and you will report to the Senior Staff Silicon Engineer. You will: - Work with researchers and architects to translate high level requirements into hardware features - Specify and design microarchitectures to deliver world class

PDK LVS Development Engineer Malaysia, Penang posted: Posted 30+ Days Ago

SoC Functional Validation Engineer Malaysia, Penang posted: Posted 30+ Days Ago

Infrastructure Hardware Technical Program Manager (Server and Network Systems) Sunnyvale CA or Toronto Canada Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. As an Infrastructure Hardware Technical Program Manager (Server and Network Systems) on the Cluster Architecture Team, you will drive end-to-end delivery of server and network platform programs across Cerebras CS-3-based AI clusters - from requirements and vendor selection through lab bring-up, qualification, and production rollout. You will be the execution owner for multi-team programs spanning OEM/ODM partners, component vendors, internal software/runtime teams and architects, validation/QA, and deployment/operations. This role is intentionally technical: you must understand server, network, and