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Stmicroelectronics jobs

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  • ALTERNANCE- Spécialiste support client F/H

    STMicroelectronics - Tours, France
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Other - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    ALTERNANCE- Spécialiste support client F/H Tours, France

  • CDI - Ingénieur Test EWS F/H

    STMicroelectronics - Crolles, France
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Other - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    CDI - Ingénieur Test EWS F/H Crolles, France

  • CDI - Manager équipe de production EWS (équipe A/B) F/H

    STMicroelectronics - Rousset, France
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"Role: semantic match
    Unspecified Operations From the posting source - Senior From the posting source Salary not disclosed Inferred from posting 401(k) reported

    CDI - Manager équipe de production EWS (équipe A/B) F/H Rousset, France

  • Failure Analysis Engineer - Physical Analysis

    STMicroelectronics - Calamba, Philippines
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Failure Analysis Engineer - Physical Analysis Calamba, Philippines

  • Stage 6 mois "Energie de collage pour nouveaux matériaux"

    STMicroelectronics - Crolles, France
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"Role: semantic match
    Unspecified Other - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Stage 6 mois "Energie de collage pour nouveaux matériaux" Crolles, France

  • VIE - Chine - Ingénieur R&D en technologies de packaging et d’assemblage H/F

    STMicroelectronics - Tours, France
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"Role: semantic match
    Unspecified Other - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    VIE - Chine - Ingénieur R&D en technologies de packaging et d’assemblage H/F Tours, France

  • Automatic Optical Inspection Engineer

    STMicroelectronics - Hal Kirkop, Malta
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Automatic Optical Inspection Engineer Hal Kirkop, Malta

  • Cellular SoC Static Timing Analysis Engineer

    Apple - San Diego, United States of America
    Indexed from Apple Custom Benefit evidence checked Jun 13, 2026 Comp disclosed in posting
    posted 337 days ago

    Why we showed this

    Role: semantic match
    Unspecified Engineering From the posting source - Mid From the posting source $172K-$302K From the posting source Equity Inferred from posting 401(k) reported

    Cellular SoC Static Timing Analysis Engineer San Diego, United States of America Do you have a passion for invention and self-challenge? Do you thrive on pushing the limits of what's considered feasible. As part of a world class modem team, you'll be at the heart of chip design! Apple recently announced first in-house 5G modem platforms, the C1 and C1X, designed to deliver industry-leading connectivity performance, improved energy efficiency, and seamless integration with Apple's custom silicon. You'll ensure Apple products and services can seamlessly handle the tasks that make them beloved by millions. Join us, and you'll help us innovate new cellular technologies that continually outperform the previous iterations! Do you want to have an impact on every single Apple product? As an ASIC STA engineer, you will be responsible for all aspects of timing including, working with designers for timing constraints generation, helping construct/modify flows, timing analysis and timing closure. As an ASIC STA Engineer, you will have responsibilities spanning various aspects of SOC design: Full chip and block level timing closure ownership throughout the entire project. Generation of block and full chip timing constraints. Own timing sign-off to make sure timing requirements are met across all corners, modes, and conditions. Work closely with various multi-functional teams on resolving sophisticated timing issues for major building blocks of complex SoCs. Work on Apple SoC (System-on-Silicon) chips in deep sub-micron technologies targeted for high end mobile applications. As an STA Engineer, the day-to-day work involves performing static timing analysis across multiple

  • Maintenance Engineer (12 hrs Rotating Shift)

    STMicroelectronics - Singapore
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Maintenance Engineer (12 hrs Rotating Shift) Singapore

  • Sr Principal Engineer, PD Expert (MCU and derivative devices)

    Renesas Electronics - Austin, TEXAS, United States
    Indexed from Smartrecruiters Benefit evidence checked Jun 7, 2026
    posted 113 days ago

    Why we showed this

    Role: semantic match
    Unspecified Data From the posting source - Staff Plus From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Sr Principal Engineer, PD Expert (MCU and derivative devices) Austin, TEXAS, United States Company Description: This role is a senior technical authority responsible for defining, aligning, and governing Physical Design Architecture, Technology aspects, Foundry selection & PPA. The technologist serves as the primary interface between the internal SoC Physical Design organization and the foundry, systems team & ensure competitive edge. Job Description: Foundry (TSMC) Interface & Ownership Primary technical point of contact with TSMC for Physical Design. Technical discussions with foundry team internal and external with regards to foundry selection Work with foundry & technology to define requirements for signoff & collaterals. AI Initiative Lead an AI initiative focusing cost reduction of MCU development Drive the AI strategy of Physical team in conjunction with methodology teams and external vendors. Pilot AI initiatives within organization including scoping, definition & implementation. Physical Design Architecture Definition and Feasibility Work with system architects, Architecture team & Chip leads to ensure physically realizable architecture for MCU designs Drive Physical Partitioning, latency, pipeline planning, IO & AC requirement with leads. Align Die-size & PPA targets & KPI for SoC/MCUs Qualifications: Master's degree in electrical, Electronics, or Computer Engineering. 18-20+ years of experience in Physical Design with multiple -node tapeouts. Experience handling MCU designs, Familiarity with Architecture & Design Additional Information: Renesas is an embedded semiconductor solution provider driven by its Purpose ' To Make Our Lives Easier .' As the industry's leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to

  • Stage - Ingénieur 4_6mois, déploiement interface d'execution d'experiences automatisée F/H

    STMicroelectronics - Crolles, France
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"Role: semantic match
    Unspecified Other - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Stage - Ingénieur 4_6mois, déploiement interface d'execution d'experiences automatisée F/H Crolles, France

  • Preventive Maintenance Technician (12H Rotating Shift)

    STMicroelectronics - Singapore
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Engineering From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Preventive Maintenance Technician (12H Rotating Shift) Singapore

  • Sr. System Electrical Engineer, eero

    Amazon - San Francisco, California, USA
    Indexed from Amazon Custom Benefit evidence checked Jun 7, 2026 Comp disclosed in posting
    posted 296 days ago

    Why we showed this

    Role: semantic match
    Unspecified Data From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource $214K-$214K From the posting source Equity Inferred from posting 401(k) reported US citizenship required

    Sr. System Electrical Engineer, eero San Francisco, California, USA As a Sr. System Electrical Engineer at eero, you will work with the rest of the Hardware Engineering team to design, implement, debug, and characterize embedded systems for wired and wireless networking applications. You may own one or more electrical sub-systems within a hardware product, ranging from low-speed digital logic circuits to memory and high-speed digital interfaces, as well as the integration of those into the rest of the system. You will collaborate with RF and antenna engineers to integrate these sensitive sub-systems without compromising their performance. You will also work with mechanical engineers to ensure that electronic components are placed at suitable locations within a device, have proper thermal management solutions associated with them, and can meet reliability requirements. Key job responsibilities In this role, you will: • Evaluate and select electronic components based on system requirements • Develop and review board schematics • Review and optimize board layouts for signal and power integrity • Perform bring-up of new board designs • Develop hardware test plans and automation scripts for engineering and manufacturing tests • Participate in the process of taking eero's hardware from the prototype stage to mass production • Provide engineering support to manufacturing during the NPI process Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. About

  • Assistant Maintenance Engineer (12H Rotating Shift)

    STMicroelectronics - Singapore
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Assistant Maintenance Engineer (12H Rotating Shift) Singapore

  • ALTERNANCE - Technicien maintenance - F/H

    STMicroelectronics - France | Rousset, France
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Trades From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    ALTERNANCE - Technicien maintenance - F/H France | Rousset, France

  • Cellular SoC Static Timing Analysis Engineer

    Apple - San Diego, United States of America
    Indexed from Apple Custom Benefit evidence checked Jun 13, 2026 Comp disclosed in posting
    posted 338 days ago

    Why we showed this

    Role: semantic match
    Unspecified Engineering From the posting source - Mid From the posting source $120K-$181K From the posting source Equity Inferred from posting 401(k) reported

    Cellular SoC Static Timing Analysis Engineer San Diego, United States of America Do you have a passion for invention and self-challenge? Do you thrive on pushing the limits of what's considered feasible. As part of a world class modem team, you'll be at the heart of chip design! Apple recently announced first in-house 5G modem platforms, the C1 and C1X, developed to deliver industry-leading connectivity performance, improved energy efficiency, and seamless integration with Apple's custom silicon. You'll ensure Apple products and services can seamlessly handle the tasks that make them beloved by millions. Join us, and you'll help us innovate new cellular technologies that continually outperform the previous iterations! Do you want to have an impact on every single Apple product? As an ASIC STA engineer, you will be responsible for all aspects of timing including, working with designers for timing constraints generation, helping construct/modify flows, timing analysis and timing closure. As an ASIC STA Engineer, you will have responsibilities spanning various aspects of SOC design: Full chip and block level timing closure ownership throughout the entire project. Generation of block and full chip timing constraints. Own timing sign-off to make sure timing requirements are met across all corners, modes, and conditions. Work closely with various multi-functional teams on resolving sophisticated timing issues for major building blocks of sophisticated SoCs. Work on Apple SoC (System-on-Silicon) chips in deep sub-micron technologies targeted for high end mobile applications. As an STA Engineer, the day-to-day work involves performing static timing analysis across multiple

  • ALTERNANCE - Chargé de communication - F/H

    STMicroelectronics - Rousset, France
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Marketing From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    ALTERNANCE - Chargé de communication - F/H Rousset, France

  • CDI - Technicien de maintenance EWS (équipe de nuit fin de semaine) F/H​

    STMicroelectronics - Rousset, France
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"Role: semantic match
    Unspecified Trades From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    CDI - Technicien de maintenance EWS (équipe de nuit fin de semaine) F/H​ Rousset, France

  • Manufacturing Planning Senior Engineer

    STMicroelectronics - Hsinchu City, Taiwan
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Data From the posting source - Senior From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Manufacturing Planning Senior Engineer Hsinchu City, Taiwan

  • HR Partner (Maternity Cover)

    STMicroelectronics - Agrate Brianza, Italy
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Sales From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    HR Partner (Maternity Cover) Agrate Brianza, Italy

  • Alternant(e) Qualité - Audit QMS

    STMicroelectronics - Crolles, France
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Finance From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Alternant(e) Qualité - Audit QMS Crolles, France

  • Senior Engineer - Project Leader (NPI)

    STMicroelectronics - Calamba, Philippines
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Data From the posting source - Senior From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Senior Engineer - Project Leader (NPI) Calamba, Philippines

  • Head of Operations - GKA

    STMicroelectronics - Santa Clara, United States | Austin, United States
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"Role: semantic match
    Unspecified Operations From the posting source - Staff Plus From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Head of Operations - GKA Santa Clara, United States | Austin, United States

  • Alternance - Spécialiste Commercial Marketing - F/H

    STMicroelectronics - Tours, France
    Indexed from Eightfold Benefit evidence checked Jun 7, 2026
    posted 111 days ago

    Why we showed this

    Employer: "stmicroelectronics"
    Unspecified Sales From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Alternance - Spécialiste Commercial Marketing - F/H Tours, France

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