Stmicroelectronics jobs

QFP Assembly Maintenance Manager Muar, Malaysia

Supplier Quality Manager Hal Kirkop, Malta

Electrical Engineer, Implant Embedded Systems Austin, Texas, United States; South San Francisco, California, United States About Neuralink: We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world. Team Description: We build the electrical systems that make high-bandwidth brain-computer interfaces possible. This includes neural signal acquisition and stimulation to wireless power delivery, embedded processing, and system integration-all within devices small enough to be implanted in the human body and efficient enough to operate under strict thermal and power constraints. Our work sits at the intersection of analog, RF, digital, and biological systems. Many problems in this space do not present clean abstractions or clear failure modes. Success often depends on careful measurement, iteration, and engineering judgment across multiple interacting systems. Job Responsibilities : - Utilize electrical engineering fundamentals and best system design practices to deliver high-performant, reliable, and manufacturable extremely size-constraint systems - Contribute to all phases of system and board design, from system definition to part selection, schematic design, layout, bring up, and design verification - Help conduct R&D investigations and experiments to demonstrate feasibility of new technology for the implant and the charger - Work cross functionally to ensure successful systems integration - Contribute to system improvements that decrease latency and increase battery life, reliability, and safety - Design and deploy systems for implant-charger hardware in the loop testing, and manufacturing line quality

Sr. Staff Engineer - Timing Methodology Austin, Texas, United States Company Overview Ambiq is on a mission to enable intelligence everywhere - powering the AI edge revolution with the world's lowest-power semiconductor solutions. Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 290 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications. Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology. We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency. At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve. If that's you, join us - the intelligence everywhere revolution starts here. Scope As a Sr. Staff Engineer - Timing Methodology, you will play a critical role in transforming our cutting-edge designs into silicon reality. You will be responsible for all aspects of timing closure from defining methodology, developing flows, closing timing at the block level and timing convergence at SOC level as well. Responsibilities: In-depth expertise on Timing Methodology and Timing closure both at block level and SOC level in modern Finfet and multi-patterning based process technologies using Cadence Tempus or Synopsys Primetime. Own all aspects of timing convergence, including

ALTERNANCE - Eco-design methodologies in R&D - H/F Rousset, France

Failure Analysis Engineer - Electronics Calamba, Philippines

Technicien process Photolithography F/H - Equipe 2x8 Rousset, France

Multimedia Intern Santa Clara, United States | Coppell, United States | Schaumburg, United States | Burlington, United States | Austin, United States

Account Executive Santa Clara, United States

Sr Electrical Engineer - FPGA (Onsite) US-IA-CEDAR RAPIDS-121 ~ 350 Collins Rd NE ~ BLDG 121 posted: Posted 30+ Days Ago

Internship - AI based automation for software package quality control. Catania, Italy

CIFRE - Side Channel Attacks on Post Quantum Cryptography Algorithms F/H Rousset, France

Fire System Maintenance Engineer Calamba, Philippines

Sr Analog Design Engineer Catania, , Italy Company Description: Job Description: Renesas is seeking a Senior Analog IC Design Engineer for our Power Product Group, Performance Computing Power Team in Catania (Italy). Reporting to the Director of Engineering, you will have responsibility for the design, verification and validation of power management IC's that supply the world's largest and most advanced computing platforms. Your responsibilities encompass the full design cycle spanning from product definition to IC validation. Responsibilities Perform transistor-level design of mixed-signal power management circuit blocks Evaluate tradeoffs among different circuit topologies for performance and area Oversee the work of Layout Engineers Write design review documentation, prepare verification and validation plans Conduct design reviews and provide feedback to ensure design quality and compliance with specifications Participate in test specification development and support Test Engineers Support Validation Engineer during lab debug and datasheet compliance testing Support Application Engineering and Product Engineering Qualifications: BSc with 5+ years, MSc with 3+ years, or PhD in Electrical Engineering Knowledge of CMOS and bipolar transistors, diodes, resistors, capacitors, inductors Knowledge of basic circuit blocks (voltage/current references, current mirrors, amplifiers, comparators, oscillators and clocking circuits, digital gates) Knowledge of feedback control theory and systems Knowledge of low-voltage (1V-5V) and high-voltage (12V-100V) BCD technologies Knowledge of design and analysis technique for analog circuit blocks (process/voltage/temperature corners and Montecarlo statistical simulations) Familiarity with Cadence design tools Familiarity with switch-mode and linear regulator topologies Familiarity with electronic test equipment Good communication skills Good knowledge of written and spoken English

EWS Production Control Engineer Singapore, Singapore

Summer Internship 2026: Clock Creator: Migration from GLSP-based Frontend to React:Design and POC implementation Intern Tunis, Tunisia

Staff Engineer, STA and Synthesis Bengaluru, KA, India Company Description: Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world's leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what's next in electronics and the world. Job Description: The STA Engineer is responsible for ensuring robust timing closure and signoff readiness for block- and full-chip designs across all modes and corners. This role owns timing constraint development and validation, performs detailed setup/hold and variation-aware analysis, and partners closely with Synthesis, CTS, Physical Design, and Design teams to debug violations

CDI – Ingénieur Senior Digital Design SoC H/F Grenoble, France

HR Manager - HR Partner Muar, Malaysia

STAGE - Modélisation, évaluation impact des défauts sur le rendement des puces de haute technologie Crolles, France

Sr Staff Digital IC Design Cork, IE Essential Duties and Responsibilities include the following. Other duties may be assigned. Development of IC architectures. Design and specification of system blocks including RISC/ARM processors, DSP cores and communications interfaces. Specification and design of digital & mixed-signal sub-systems. Verification of design blocks at block-level, system-level and chip-level. Active participation in product and technology roadmap planning and implementation. Participation and leadership of design reviews for assigned areas of responsibility. FPGA prototyping and evaluation of power control schemes for real-world scenarios. Low power ASIC design - from concept through to post-layout evaluation. Chip integration, design synthesis, constraint development, timing closure & backend support. Design-For-Testability (DFT) including ATPG. Maintenance of engineering documents in accordance with quality processes. Structured tracking and implementation of design improvements. Support for test-engineering, product engineering and operations as well as participation in ATE data reviews, limit reviews and device yield analysis. Experience: Successful candidates will have most of the following: 7+ years of digital circuit design experience in ASIC/SOC environments. PhD, post-graduate or degree qualification in Electronic Engineering or similar. Experience and knowledge of power conversion. Verilog RTL coding, simulation and synthesis. Experience with FPGA prototyping. Digital Signal Processor and/or computational hardware design experience. Self-motivated, individual contributor with strong problem solving skills. Experience of working in wide-ranging roles and flexible environments. Excellent interpersonal and communications skills. The ability to work with cross-functional teams. Vishay offers a comprehensive suite of benefit programs designed to help you achieve your personal and professional goals. With

Sr Staff Application Engineer - Si Power MOSFET Taipei, , Taiwan Company Description: Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world's leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what's next in electronics and the world. Job Description: Application engineering role for Si MOSFET development Evaluation samples, benchmarking test, Power loss, temperature, waveform Simulation work. Customer technical support. Visiting the customers in Taiwan and Discussion with customer to develop the business. Key Responsibilities Spice simulation and waveform analysis for the circuit using MOSFET (PSpice, LTSpice, Simetrix) Power

CDI - IT - Responsable Application / Ingénieur Logiciel Expérimenté - F/H Crolles, France | France

Technicien Maintenance Préventive CMP Eq A - F/H Rousset, France