AI Silicon, Design Verification

Benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Not verified

Salary

Not verified

401(k) match

Not verified

Was this benefit information wrong? Tell us.

Market context

Median wage (BLS OEWS)

$66,396 national median

Projected growth (BLS Employment Projections)

+3.5% - Average

Matched to SOC 27-1024 - Design aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Schedule

Shift type

Not verified

Weekend work

Not verified

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

AI Silicon, Design Verification Palo Alto, CA I US Remote About Unconventional: Since 2022, AI has entered the mainstream, reshaping entire industries from education and software development to fundamental consumer behaviors. This revolution has created an unprecedented demand for computation - a demand that is now fundamentally limited by energy, not just in the datacenter, but at a global scale. At Unconventional, our mission is to solve this. We are rethinking computing from the ground up to build a new foundation for AI that is 1000x more efficient. We're doing this by exploiting the rich physics of semiconductors, mapping neural networks directly to the device physics rather than relying on layers of inefficient abstraction. Responsibilities: - Verification Strategy & Architecture: Define, architect, and implement comprehensive verification plans and environments for IP blocks and full chip from specification to tape-out. - Methodology and Infrastructure: help build verification infrastructure from ground zero to flexible and nimble environments, able to move quickly and scale for growth. - Testbench Ownership: Take full ownership of the verification lifecycle, including the development and maintenance of scalable testbenches, sophisticated test cases, and robust verification environments. - Advanced Methodology Execution: Deploy industry-standard methodologies (UVM/SystemVerilog) to conduct constrained-random stimulus generation, coverage-driven verification, and assertions. - Cross-Functional Integration: Collaborate closely with digital and analog design teams, as well as software and systems teams, to define verification requirements, debug complex hardware/software interactions, and ensure design integrity. - Analysis & Closure: Perform exhaustive analysis of functional and code coverage. Debug failures at

Read the full description at unconv.ai. FewerJobs shows a source-linked preview and links to the original posting.