Staff Engineer, SoC RTL Engineer
TensTorrent - Tokyo, Japan
Posted Apr 21, 2026
Benefits
- Parental leave
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- Non-birth-parent leave
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- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
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- Relocation assistance
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- Childcare support
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Schedule
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- Weekend work
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Application
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About this role
Staff Engineer, SoC RTL Engineer Tokyo, Japan Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Staff Digital Design Engineer to help define, build, and optimize high-performance chiplet based SoC architectures. This role is ideal for engineers who thrive at the intersection of microarchitecture, RTL implementation, and performance and power aware design. This role is hybrid, based out of Tokyo. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are - A digital design expert with a deep understanding of computer architecture and IP microarchitecture. - Skilled in RTL development (Verilog/VHDL) and familiar with full ASIC flows. - Comfortable optimizing for power, performance, and area (PPA) under aggressive design goals. - A naturally collaborative and technical engineer - you thrive in spec definition, peer reviews, and team-wide planning. - Strong synthesis
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