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Principal DFT Engineer (Silicon Engineering)

SpaceX - Irvine, CA

Posted May 22, 2026

Benefits

Parental leave
Not verified
Non-birth-parent leave
Not verified
Family-building benefits
  • Fertility benefits: Not verified
  • Adoption assistance: Not verified
  • Surrogacy assistance: Not verified
Mental health support
Not verified
Relocation assistance
Not verified
Childcare support
Not verified
Learning budget
Not verified
Verification
Not verified
Salary
$200K-$285K From the posting source checked Jun 20, 2026
401(k) match
Not verified

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Market context

U.S. role benchmark (BLS OEWS)
$55,390 U.S. median for this role
Projected growth (BLS Employment Projections)
-0.1% - Decline

338% above the BLS role benchmark for teaching and education aggregate.

Posted salary is far from this role benchmark; treat it as low confidence.

Matched to SOC 25-2021 - Teaching and Education aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function
Teaching Education From the posting source checked Jun 20, 2026
Seniority
Principal From the posting source checked Jun 20, 2026

Schedule

Shift type
Not verified
Weekend work
Required From the posting source checked Jun 20, 2026

Company

Equity
Offered From the posting source checked Jun 20, 2026

Application

Cover letter
Not verified
Assessment
Not verified
Deadline
Not stated

Where they hire

State eligibility is not yet verified.

About this role

Principal DFT Engineer (Silicon Engineering) Irvine, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. PRINCIPAL DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering and ASIC implementation). In this role, you will be developing next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network. RESPONSIBILITIES: - Lead implementation and optimization of DFT

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