Sr Staff Analog Engineer
Renesas Electronics - San Jose, CALIFORNIA, United States
Posted Jun 12, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified checked Jun 7, 2026
- Salary
- Not verified
- 401(k) match
- Reported from DOL Form 5500 industry filing (not employer-specific)
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Market context
- U.S. role benchmark (BLS OEWS)
- $111,944 U.S. median for this role
- Projected growth (BLS Employment Projections)
- +13.7% - Much faster than average
Matched to SOC 15-1252 - Data and ML aggregate by role bucket.
Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.
Schedule
- Shift type
- Not verified
- Weekend work
- Not verified
Application
- Cover letter
- Not verified
- Assessment
- Not verified
- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Sr Staff Analog Engineer San Jose, CALIFORNIA, United States Company Description: Renesas Electronics is expanding its Configurable Mixed-Signal Division (CMSD), the team behind the market-leading GreenPAK™ product family. With billions of units shipped globally, this customer-configurable platform enables companies to differentiate their products, reduce BOM costs, and accelerate development times across automotive, industrial, data center, and consumer applications. As we continuously expand our portfolio to include high-performance analog IPs, DC-DC converters, and FPGAs, we are seeking an Analog Senior Staff Engineer - High-Voltage Analog/Precision to join our R&D organization. Job Description: As an Analog Senior Staff Engineer, you will design and verify complex analog block-level and sub-system circuits to meet the functional and performance specifications of custom mixed-signal ASICs to give the company a competitive advantage in the IC market. It will be your responsibility to perform feasibility studies and analyze new analog design concepts. You will be involved in the comparison of competitor solutions and propose differentiating solutions. Responsibilities Specify and design CMOS circuits meeting performance, area, power, and timescale constraints. Run analog/mixed signal verification simulations at block and/or chip level. Collaborate with project leads to achieve the system and design strategy for custom ASICs. Guide the layout team to ensure quality of layout of own designs. Produce high-quality documentation for the designed circuits. Work closely with DFT engineers to ensure alignment to DFT strategy and implementation. Drive silicon debugging and design characterization. Support and participate in lab evaluation and characterization for own designs. Work with test and product
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