Senior Manager Analog Engineering

Benefits

Parental leave

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Family-building benefits

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Verification

Not verified checked Jun 7, 2026

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401(k) match

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Market context

U.S. role benchmark (BLS OEWS)

$111,944 U.S. median for this role

Projected growth (BLS Employment Projections)

+13.7% - Much faster than average

Matched to SOC 15-1252 - Data and ML aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

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Seniority

Senior From the posting source

Schedule

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Weekend work

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Deadline

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Where they hire

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About this role

Senior Manager Analog Engineering San Jose, CALIFORNIA, United States Company Description: This position is in CMSD (Configurable Mixed-Signal Division), which is part of Renesas' Analog & Mixed-Signal Product Group. The CMSD R&D team develops and industrializes highly configurable mixed-signal products for a wide range of applications, including but not limited to consumer, communication, computing, data center, industrial, and automotive applications. The CMSD team is the pioneer and dominant market leader of the highly successful GreenPAKTM family of products. These customer configurable products and platforms enable customers to differentiate their products, reduce BOM cost, and development cost and time. The CMSD team is continuously expanding the product portfolio that includes high-performance analog IP's, DC-DC converters, and FPGA solutions. As a Senior Manager Analog Engineering you will lead a team of analog designers and be the technical project lead for the development of our configurable mixed-signal ASICs. You will be responsible for all technical aspects of the project, from the initial concept phase through definition and architecture selection to design development, verification, and collaboration with cross-functional teams (test development, qualification etc.) to prepare the product for market release. Job Description: Work with the product definition and marketing team to develop a specification that gives the product a competitive advantage in the IC market Develop the product's system architecture to optimize performance, power, and die size Specify the requirements of individual IPs used in the product Work with the project manager to define a development plan for design, verification, and layout Develop a

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