Principal Engineer, Architecture/Chip Leader

Benefits

Parental leave

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Non-birth-parent leave

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Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

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Relocation assistance

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Childcare support

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Learning budget

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Verification

Not verified checked Jun 7, 2026

Salary

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401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$111,944 U.S. median for this role

Projected growth (BLS Employment Projections)

+13.7% - Much faster than average

Matched to SOC 15-1252 - Data and ML aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Data From the posting source

Seniority

Staff Plus From the posting source

Schedule

Shift type

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Weekend work

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Application

Cover letter

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Assessment

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Deadline

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Where they hire

State eligibility is not yet verified.

About this role

Principal Engineer, Architecture/Chip Leader Kodaira, , Japan Company Description: Job Description: 【Reason for Hiring】 We are looking for an experienced leader for high performance SOCs & MCUs, to lead the Technical Project Leaders/Chip leads and SOC Architecture organization working closely with business, product marketing, system architects, SOC design architects and designers, software architects and developers. 【Role Responsibilities】 The successful candidate will be expected to Lead the SoC/MCU architecture team to define system architecture and technical specifications based on business and product requirements. Drive the end-to-end development of high-performance SoCs and MCUs, ensuring high-quality, on-schedule, first-time-right tape-out. Collaborate closely with cross-functional teams including product marketing, program management, software, manufacturing, functional safety (FuSa), and cybersecurity. Make key technical decisions on IP selection and make-or-buy strategies aligned with product and roadmap requirements. Manage and mentor R&D teams, assess team capabilities, and contribute to product, architecture, and IP roadmap planning. Continuously improve development processes to optimize quality, cost, and efficiency across chip, IP, and platform teams. Engage with external stakeholders such as suppliers, technical partners, and industry standard bodies. Promote knowledge sharing, training programs, and best practices across the organization. 【 What We Offer 】 Opportunity to work on the latest and most advanced technologies Rare chance to be involved in such state-of-the-art technology - something not easily found in other companies While the role is demanding, the experience gained is highly valuable and transferable, enabling future success in top-tier technical positions globally Qualifications: 【MUST】 Strong background in system and architecture-level design Proven track

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