Senior Principal IP Enablement Engineer

Benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Not verified

Salary

$183K-$225K From the posting source checked Jun 20, 2026

401(k) match

Not verified

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Market context

U.S. role benchmark (BLS OEWS)

$55,390 U.S. median for this role

Projected growth (BLS Employment Projections)

-0.1% - Decline

268% above the BLS role benchmark for teaching and education aggregate.

Posted salary is far from this role benchmark; treat it as low confidence.

Matched to SOC 25-2021 - Teaching and Education aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Teaching Education From the posting source checked Jun 20, 2026

Seniority

Principal From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Company stage

Public-company From the posting source checked Jun 20, 2026

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Senior Principal IP Enablement Engineer Carlsbad, CA, US Responsibilities MaxLinear is seeking a Senior Principal IP Enablement Engineer to join our team. In this role, you will focus on the following: Drive IP strategy, design enablement, vendor engagement, and 3rd party IP sourcing for MaxLinear's communications and datacenter products Work closely with internal teams and external vendors to define IP requirements, evaluate competitive solutions, and support SOW and licensing activities Evaluate and enable other IPs like foundation IPs, memory compilers and work directly with foundries and 3rd party IP vendors in the Maxlinear IP and tool eco system Qualifications Industry experience in IP design, IP integration, and 3rd party IP procurement Background evaluating vendor IPs, including memory compilers and foundry provided IP Familiarity with IP qualification flows, benchmarking, and comparison analysis Understanding of PPA, timing corners, and impact of power management features like DVS/DVFS Ability to build strong cross-functional technical relationships and demonstrate strong vendor management skills Analog and digital IC design/analysis experience on SerDes and High-Speed Interface IPs Exposure to IP licensing or negotiation processes BS in Electrical Engineering or related + 11 years of experience, or MS + 9 years of experience, or Ph.D. + 6 years of experience Compensation and Benefits MaxLinear has a Total Compensation philosophy which includes base salary and annual discretionary bonus eligibility and many positions also

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