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Runtime Engineer

MatX - Mountain View, CA

Posted May 27, 2026

Benefits

Parental leave
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Non-birth-parent leave
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Family-building benefits
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  • Surrogacy assistance: Not verified
Mental health support
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Relocation assistance
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Childcare support
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Learning budget
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Salary
$120K-$250K not verified - timestamp not recorded
401(k) match
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Market context

U.S. role benchmark (BLS OEWS)
$116,543 U.S. median for this role
Projected growth (BLS Employment Projections)
+9.8% - Much faster than average

59% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Schedule

Shift type
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Weekend work
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Application

Cover letter
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Assessment
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Deadline
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Where they hire

State eligibility is not yet verified.

About this role

Runtime Engineer Mountain View, CA What MatX is Building MatX is building custom silicon for large-language-model inference and training, with HW/SW co-design across ISA, RTL, simulator, compiler, and kernels so each layer benefits from the others. The runtime owns the host-side stack and the contracts that bind those teams together. What You'll Do Here - Build the host-side interface library - device memory management, DMA, streams and events, sync primitives - that every compiler-emitted program runs on top of - Own and extend the executable format: the compiler→runtime contract, its versioning, the weight and quantization layouts that let compiler and runtime evolve independently - Design the custom-kernel ABI - calling convention, sync semantics, lifecycle - and the host-side marshaling layer (DLPack, the buffer protocol, numpy) that gets Python tensors to the device - Build Python bindings via PyO3, with a C-ABI shim as the alternative integration path for downstream consumers - Build the LLM inference serving stack - paged KV cache, continuous batching, request scheduling, token streaming - and the cluster orchestration primitives underneath it - Bring up interconnect topology from the host and own the failure-detection and clean-teardown path for stop-restructure-resume recovery across racks - Design what the chip exposes to host-side profilers and debuggers - perf counters, traces, and the Python surfaces ML engineers actually use - and hit measurable performance targets on runtime overhead and serving throughput Who You Are - Strong experience in a systems programming language - Rust, C, C++, or Go - including memory

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