Member of Technical Staff, Kernel Engineering
Inferact - San Francisco, California, United States
Posted Jan 22, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
-
- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified
- Salary
- $200K-$400K From the posting source checked Jun 20, 2026
- 401(k) match
- Reported not verified - source not recorded; source URL not recorded; timestamp not recorded
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Market context
- U.S. role benchmark (BLS OEWS)
- $116,543 U.S. median for this role
- Projected growth (BLS Employment Projections)
- +9.8% - Much faster than average
157% above the BLS role benchmark for software engineering aggregate.
Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.
Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.
Role
Schedule
- Shift type
- Not verified
- Weekend work
- Not verified
Company
- Equity
- Offered From the posting source checked Jun 20, 2026
Application
- Cover letter
- Not verified
- Assessment
- Not verified
- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Member of Technical Staff, Kernel Engineering San Francisco, California, United States Inferact's mission is to grow vLLM as the world's AI inference engine and accelerate AI progress by making inference cheaper and faster. Founded by the creators and core maintainers of vLLM, we sit at the intersection of models and hardware-a position that took years to build. About the Role We're looking for a performance engineer to squeeze every FLOP out of modern accelerators. You'll write the kernels and low-level optimizations that make vLLM the fastest inference engine in the world. Your code will run on hundreds of accelerator types, from NVIDIA GPUs to emerging silicon. When hardware vendors develop new chips, they integrate with vLLM. You'll work directly with these teams to ensure we're extracting maximum performance from every generation of hardware. Skills and Qualifications Minimum qualifications: - Bachelor's degree or equivalent experience in computer science, engineering, or similar. - Deep experience writing CUDA kernels or equivalent (CuTeDSL, Triton, TileLang, Pallas). - Strong understanding of GPU architecture: memory hierarchy, warp scheduling, tiling, tensor cores. - Proficiency in C++ and Python with demonstrated ability to write high-performance code. - Experience with profiling tools (Nsight, rocprof) and performance optimization methodologies. - Obsession with benchmarks and squeezing every percentage point of speedup. Preferred qualifications: - Experience with ML-specific kernel optimization (FlashAttention, fused kernels). - Knowledge of quantization techniques (INT8, FP8, mixed-precision). - Familiarity with multiple accelerator platforms (NVIDIA, AMD, TPU, Intel). - Experience with compiler technologies (LLVM, MLIR, XLA). Bonus points if
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