Silicon CAD Engineer, University Graduate, PhD

Benefits

Parental leave

18 weeks From the posting source checked Jun 20, 2026

Non-birth-parent leave

18 weeks From the posting source checked Jun 20, 2026

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Source-linked checked May 7, 2026

Salary

$138K-$198K From the posting source checked Jun 20, 2026

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

44% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Mid From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Silicon CAD Engineer, University Graduate, PhD Sunnyvale, CA, USA In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a Silicon CAD Engineer, you will collaborate closely with domain experts in various aspects of silicon development to architect, design, code, and test projects that will have immediate impact on chips powering the next generation of Google Cloud systems. You will work well both separately and as part of a team. In this role, you will work with CI2 Silicon Development teams and your peers in the Infrastructure, Tools, and Methodology team to develop and enhance design tools and design flows that speed the development of CI2's ground-breaking TPU, CPU, and networking chips and enable them to provide generational improvements in performance, power, and cost while enhancing reliability. You will weave your work into the deep tech stack of silicon design, composed of a mix of licensed Electronic Design Automation (EDA) tools, custom tooling, and emergent technologies from GDM and core. The AI and Infrastructure team is redefining what's possible. We empower

Read the full description at www.google.com. FewerJobs shows a preview and links to the original posting.