Senior Photonics Integrated Circuit Design Engineer

Verified benefits

Parental leave

4 weeks source

Non-birth-parent leave

4 weeks

Verified

Yes last checked 2026-05-07

Salary

$96K-$182K

Market context

Median wage (BLS OEWS)

$66,396 national median

Projected growth (BLS Employment Projections)

+3.5% - Average

109% above the BLS national median for design aggregate.

Matched to SOC 27-1024 - Design aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Where they hire

State eligibility is not yet verified.

About this role

Senior Photonics Integrated Circuit Design Engineer US-CA-SAN DIEGO-15110 ~ 15110 Ave of Science ~ SCIENCE, Ste 200 Date Posted: 2026-03-27 Country: United States of America Location: US-CA-SAN DIEGO-15110 ~ 15110

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