Hardware Qualification Engineer, Senior Staff
d-Matrix - Santa Clara, Santa Clara, Ca, Ca, United States
Posted May 6, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
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- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
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- Relocation assistance
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- Childcare support
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- Learning budget
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- Verification
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- Salary
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- 401(k) match
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Market context
- U.S. role benchmark (BLS OEWS)
- $116,543 U.S. median for this role
- Projected growth (BLS Employment Projections)
- +9.8% - Much faster than average
Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.
Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.
Role
Schedule
- Shift type
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- Weekend work
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Application
- Cover letter
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- Assessment
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- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Hardware Qualification Engineer, Senior Staff Santa Clara, Santa Clara, Ca, Ca, United States At d-Matrix , we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive , and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together , we can help shape the endless possibilities of AI. Hardware Qualification Engineer, Senior Staff Location: Santa Clara, CA (Onsite/Hybrid) About the Role As a Hardware Qualification Engineer, Senior Staff , you will be the final gatekeeper of quality and reliability for our next-generation AI compute platforms. This is a high-impact, technical leadership role responsible for defining the qualification strategies that ensure our hardware-from ASIC substrates to Rack scale systems - can withstand the rigorous demands of 24/7 data center environments. You will bridge the gap between design and mass production, ensuring that "cutting edge" doesn't mean "fragile." Key Responsibilities - Qualification Strategy: Define and execute comprehensive HW qualification plans (EVT/DVT/PVT) for complex AI accelerator systems, including PCIe cards OAM modules and chassis systems. - Stress & Reliability Testing: Lead the implementation of HALT/HASS , thermal cycling, humidity, and vibration testing to identify marginalities in high-power ASIC designs. - Signal & Power
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