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Senior Physical Design CAD Engineer

Cisco - Bangalore, India

Posted May 18, 2026

Benefits

Parental leave
Not verified
Non-birth-parent leave
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Family-building benefits
  • Fertility benefits: Not verified
  • Adoption assistance: Not verified
  • Surrogacy assistance: Not verified
Mental health support
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Relocation assistance
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Childcare support
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Learning budget
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Verification
Not verified checked Jun 13, 2026
Salary
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401(k) match
Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)
$66,396 U.S. median for this role
Projected growth (BLS Employment Projections)
+3.5% - Average

Matched to SOC 27-1024 - Design aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function
Design From the posting source checked Jun 20, 2026
Seniority
Senior From the posting source checked Jun 20, 2026

Schedule

Shift type
Not verified
Weekend work
Not verified

Company

Company stage
Public-company From the posting source checked Jun 20, 2026
Equity
Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter
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Assessment
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Deadline
Not stated

Where they hire

State eligibility is not yet verified.

About this role

Senior Physical Design CAD Engineer Bangalore, India Meet the team You'll join the CAD Physical Design team within Cisco Silicon One, responsible for end-to-end backend methodology and flow development from RTL to GDS. This team plays a vital role in delivering high-quality VLSI designs and enabling advanced silicon innovation. Our design center brings together experts across silicon hardware and software, encouraging a collaborative environment passionate about technical excellence and continuous improvement. Your impact As a member of our team, you'll help shape and enhance signoff and implementation flows that support the delivery of high-performance, large-scale, and highly complex devices. Your work will directly contribute to pushing the boundaries of modern chip design. Develop, maintain, and improve backend methodologies and flows from RTL to GDS to enable robust, high-quality VLSI designs. Contribute to the evolution of signoff flows, including physical synthesis, place and route, power optimization, timing closure, and physical closure. Collaborate closely with multi-functional engineering teams to support and improve implementation tool flows. Work with advanced silicon technologies and process nodes to deliver reliable, ground breaking designs. Minimum qualifications We are looking for a CAD Physical Design Engineer with 8+ years of experience in Physical Design CAD with strong PnR and STA expertise, or a Design Engineer with solid backend design experience. B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or a related field. Strong understanding of Static Timing Analysis (STA) flows. Familiarity with place and route (PnR), physical verification (PV), and formal verification (FV). Hands-on experience with Physical Design

Read the full description at cisco.wd5.myworkdayjobs.com. FewerJobs shows a preview and links to the original posting.

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Apply link verified; last checked Aug 3, 2026.

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