IC Package design engineer- 4+ Years
Cisco - Bangalore, India
Posted May 12, 2026
Benefits
- Parental leave
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- Non-birth-parent leave
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- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
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- Relocation assistance
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- Childcare support
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- Learning budget
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- Verification
- Not verified last checked Jun 13, 2026
- Salary
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- 401(k) match
- Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.
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Schedule
- Shift type
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- Weekend work
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Application
- Cover letter
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- Assessment
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- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
IC Package design engineer- 4+ Years Bangalore, India Meet the Team Join the Package Design Team at Cisco Silicon One in Armenia, a group leading the way in developing Cisco's groundbreaking silicon solutions for next-generation networking. As a collaborative team at the center of Cisco's silicon development, we design and optimize advanced package solutions for some of the industry's most sophisticated ASICs. You'll work directly with experts in layout, signal integrity, and power distribution, shaping innovative methodologies and driving the evolution of high-performance networking technologies. Your Impact This role offers a unique opportunity to make a significant impact on the future of networking innovation within the Cisco Silicon One initiative. As a lead engineer, you will drive the entire package design process-from planning and optimization to execution-ensuring the delivery of high-speed, robust, and scalable solutions for global networks. You will mentor engineers, define strategies, and collaborate across multi-functional teams to accelerate the creation of industry-leading silicon packages. Beyond technical leadership, you'll join a passionate community dedicated to changing how the world connects, works, and learns, while building strong partnerships and fostering collective success. Responsibilities Lead package design tasks, planning and driving schedules from concept through implementation Optimize package pinouts, stack-ups, power distribution, and high-speed routing, balancing performance and manufacturability Collaborate with silicon floor planning, signal integrity (SI), and power integrity (PI) teams to ensure design quality and efficiency Work closely with layout editors to deliver high-quality package designs aligned with interface requirements Enhance design methodologies and partner with vendors to
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