Analog/mixed-signal IC Design Developer

Benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Not verified checked Jun 13, 2026

Salary

$144K-$194K From the posting source checked Jun 20, 2026

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

U.S. benchmark only; posted salary is not compared across countries or currencies.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Mid From the posting source checked Jun 20, 2026

Work mode

Hybrid From the posting source checked Jun 20, 2026

In-office days

2 days From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Company stage

Public-company From the posting source checked Jun 20, 2026

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Analog/mixed-signal IC Design Developer Kanata, Ontario, Canada The application window is expected to close on: Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . The application window is expected to close on 6/1/26. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This is a hybrid role that can be performed three days per week from our Ottawa or Vancouver BC location. Meet the Team Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G, 800G and 1.6T+ bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks. You will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC. In addition, you will have the opportunity to interact with other Acacia groups including digital/DSP design, system design, package design, and module design. Acacia takes pride in providing and fostering a collaborate environment in order ensure success and personal growth. Your Impact As a member of the Mixed Signal Design team, you will be a key member of a small, dynamic IC Design group that develops high speed ()25Gb/s), and high accuracy, analog designs for optical communications products. You will architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS products. You will lead efforts for a large block on a complex chip, mentor team

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