Staff - Signal Integrity Engineer

Benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

Not verified

Relocation assistance

Not verified

Childcare support

Not verified

Learning budget

Not verified

Verification

Not verified checked Jun 7, 2026

Salary

$176K-$176K From the posting source

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$111,944 U.S. median for this role

Projected growth (BLS Employment Projections)

+13.7% - Much faster than average

57% above the BLS role benchmark for data and ml aggregate.

Matched to SOC 15-1252 - Data and ML aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Data From the posting source

Seniority

Mid From the posting source

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Equity

Offered Verified - SEC 10-K source

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Staff - Signal Integrity Engineer City San Jose | State/Province California | Country USA Req ID: 128818 Region: Country USA State/Province: State/Province California City San Jose Summary Signal integrity engineer provides design guideline and support to system architecture design, board layout, product bring up, debug, validation, and factory builds. Performs testing, simulation, validation and qualification of systems and makes design adjustments as needed. The Signal integrity engineer works in cross functional teams with other designers, customers, manufacturing engineering and project leadership to ensure robust and high quality product development. Enhance designs with feedback from reviews in areas such as manufacturing, test, supply chain, reliability, industrial design and simulations. Detailed Description Performs tasks such as, but not limited to, the following: Models high-density I/O's on PCBs, packages, connectors and probe cards with respect to parameters such as reflections, bandwidth, and crosstalk Lead the design, development and implementation of technical solutions for complex projects, involving multiple domains. Participate in project planning and scheduling. Strong knowledge in simulation tools like Hspice, Sigrity, ADS, Ansys SIwave, HFSS 3D. Strong knowledge in Signal Integrity and Power Integrity fundamental concepts. Strong experience in Package and PCB modelling is required. Keep up to date with relevant industry knowledge and regulations Performs Transmission line & Via modelling and carry out experiments to validate modelling outcome

Read the full description at careers.celestica.com. FewerJobs shows a preview and links to the original posting.