DSP or Serdes RTL Sr Principal Digital Design Engineer

Verified benefits

Parental leave

Not verified

Non-birth-parent leave

Not verified

Verified

No last checked 2026-05-07T13:50:00Z

Salary

Not disclosed

401(k) match

Not verified

Market context

Median wage (BLS OEWS)

$66,396 national median

Projected growth (BLS Employment Projections)

+3.5% - Average

Matched to SOC 27-1024 - Design aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Where they hire

State eligibility is not yet verified.

About this role

DSP or Serdes RTL Sr Principal Digital Design Engineer SAN JOSE DSP or Serdes RTL Sr Principal Digital Design Engineer /job/SAN-JOSE/RTL-Digital-design-engineer_R43530 SAN JOSE Posted 30+ Days Ago

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