Principal Engineer, SOC IP Systems & Lifecycle Management

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About this role

Principal Engineer, SOC IP Systems & Lifecycle Management San Jose, California, United States Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Role Objective As the gatekeeper of IP Management, Methodology and Quality at Astera Labs, you will lead the strategic development of our AI-powered IP Lifecycle Management and IP Quality Assurance Platform. You won't just run tools; you will architect a scalable, user-friendly system that serves as the foundation for our "AI-first" IP ecosystem. Your mission is to ensure every IP, whether internal or external is easily accessible, physically, logically, and structurally "SOC-ready," preventing late-stage integration breaks that delay tape-outs. Our vision is to revolutionize IP Management and Quality Assurance with an AI-first approach. The candidate will be responsible for developing the platform, auditing and qualifying internal and external IP (Hard/Soft Macros, PHYs, Memories and standard cells libraries among other IPs). The IPLM and IPQA tools will scale to cover SOC QA and be a key element of the tape out sign-out requirements. The successful

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