Distinguished Engineer – System & Rack Hardware Architecture
Astera Labs - United States, Remote
Posted May 19, 2026
Benefits
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- Family-building benefits
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- Fertility benefits: Not verified
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About this role
Distinguished Engineer – System & Rack Hardware Architecture United States, Remote Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Role Overview Astera Labs is at the epicenter of the AI infrastructure revolution, building the intelligent connectivity solutions that power the world's most advanced data centers. As AI workloads scale to unprecedented levels, the demand for purpose-built, rack-scale platforms that seamlessly integrate high-speed connectivity, firmware intelligence, and composable architectures has never been greater - and neither has the opportunity to shape what comes next. The AI Platform Solutions Group is seeking a Distinguished Engineer to serve as the technical visionary for next-generation AI infrastructure, spanning server firmware, high-speed connectivity, and rack-scale system design. In this role, you will define the end-to-end architecture for AI platforms that integrate cutting-edge technologies such as PCIe Gen5/6, UAlink, CXL, composable rack architectures, and advanced interconnect solutions including Astera Labs' portfolio of retimers, switches, and fabric controllers. This is a high-impact, high-visibility role where you will drive innovation across silicon integration,
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