Principal Digital Hardware Engineer (PCBs/FPGAs/HDL)

Benefits

Parental leave

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Non-birth-parent leave

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Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

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Relocation assistance

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Childcare support

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Learning budget

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Verification

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Salary

$220K-$292K not verified - source not recorded; timestamp not recorded

401(k) match

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

120% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Schedule

Shift type

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Weekend work

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Application

Cover letter

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Assessment

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Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Principal Digital Hardware Engineer (PCBs/FPGAs/HDL) Costa Mesa, California, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. WHAT YOU'LL DO - Technical lead for electrical engineering team, creating embedded compute solutions for vehicle management, DSP, and networking. - Own the full PCB development cycle of host boards for FPGAs / SoCs / SoMs (Developing requirements, schematic capture, board layout, bring-up, test, and integration). - Develop and improve workflows throughout the FPGA / HDL design cycle (Architecture, functional block definition, simulation, system testing, HDL library standardization). - Collaborate with internal stakeholders to develop a strategy for developing and rolling out your compute solutions across Anduril in a scalable manner. - Create, maintain and communicate product development schedules with sufficient detail to ensure that all assigned personnel are aware of their tasks and deadlines. REQUIRED QUALIFICATIONS - Bachelor's Degree in Electrical Engineering or equivalent - 15+ years of experience designing, testing

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