Senior Layout Design Engineer

Benefits

Parental leave

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Non-birth-parent leave

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Family-building benefits

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• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

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Relocation assistance

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Childcare support

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Learning budget

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Verification

Not verified last checked Jun 13, 2026

Salary

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401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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Market context

U.S. role benchmark (BLS OEWS)

$111,944 U.S. median for this role

Projected growth (BLS Employment Projections)

+13.7% - Much faster than average

Matched to SOC 15-1252 - Data and ML aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Schedule

Shift type

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Weekend work

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Application

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Assessment

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Deadline

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Where they hire

State eligibility is not yet verified.

About this role

Senior Layout Design Engineer Work Location (Country) Japan | Remote/Onsite Onsite Position Summary: We are seeking a highly skilled Senior Analog Layout Engineer to lead the physical layout of complex analog, mixed‑signal, and high‑performance IC designs. This role requires deep expertise in custom layout techniques, advanced process nodes, physical verification, and close collaboration with circuit designers to deliver silicon‑proven designs that meet stringent performance, reliability, and manufacturing requirements. Primary Responsibilities: Own and execute the full layout lifecycle for analog and mixed‑signal IP blocks such as ADCs, DACs, PLLs, LDOs, bandgaps, amplifiers, and pixels. Collaborate closely with circuit design engineers to understand specifications, constraints, and performance trade-offs. Develop floorplans, layout strategies, and routing plans that optimize matching, noise performance, EM/IR robustness Perform custom layout of critical analog circuits using industry‑standard EDA tools (e.g., Cadence Virtuoso). Ensure compliance with design rules (DRC), electrical rules (ERC), layout-vs-schematic checks (LVS), and parasitic extraction (PEX). Drive layout quality through guard‑ringing, shielding, isolation techniques, symmetry enforcement, and dummy placements. Work with foundry PDKs to interpret process rules, device models, and reliability requirements (ESD, EM, latch‑up). Generate and maintain layout documentation, checklists, and layout guidelines for internal use. Prepare designs for tapeout, including final checks, documentation, and

Read the full description at jobs.ametek.com. FewerJobs shows a source-linked preview and links to the original posting.