SoC Firmware Engineering Manager, Annapurna Labs Machine Learning Acceleration, AWS

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About this role

SoC Firmware Engineering Manager, Annapurna Labs Machine Learning Acceleration, AWS Cupertino, California, USA When a new Trainium or Inferentia chip comes back from the fab, our code is the first software to touch it. We're looking for a hands-on engineering manager who lives and breathes low-level software - someone who's debugged register-level issues at 3am and wants to build a team that does it better. Our SoC HAL (Hardware Abstraction Layer) team owns the lowest layer of user-space software on AWS's custom ML accelerator chips: the firmware that boots, configures, and manages every hardware block on the SoC. Your software runs as a shared library on embedded Linux, reaching into the chip to program PCIe links, initialize HBM controllers, configure PLLs, manage interrupt controllers, and orchestrate fabric interconnects across 270+ hardware block instances per chip - all deployed across millions of servers in AWS's global fleet. Tech stack: C++17, CMake, GoogleTest, Python, SystemVerilog DPI, SPI, APB/AXI bus protocols, PCIe, UCIe, HBM, PLL, custom IPs As the SoC Firmware Manager, you will: - Manage, coach, and grow a team of 6 engineers - set technical direction, own hiring, and create an environment where strong engineers want to stay - Coordinate deliverables across chip architects, RTL designers, verification engineers, validation engineers, and platform software teams - you're the single point of accountability for HAL readiness on every new chip program - Own bring-up for new SoC tape-outs, from first-silicon power-on through production fleet deployment - Prioritize work across multiple concurrent chip programs

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