Senior Pre-Silicon SoC Modeling Engineer, Annapurna Labs Machine Learning Accelerators, AWS

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About this role

Senior Pre-Silicon SoC Modeling Engineer, Annapurna Labs Machine Learning Accelerators, AWS Cupertino, California, USA AWS's Trainium and Inferentia chips power the world's largest machine learning clusters. Our team builds C++ models of these custom SoCs that RTL designers, verification engineers, and software teams depend on throughout the silicon development lifecycle. We're looking for a modeling engineer to build and own models that directly impact how our chips are designed, verified, and brought to production. What you'll do: - Build and own models of SoC subsystems - translating architecture specs and RTL behavior into accurate, testable C++ models - Work directly with RTL design and verification teams to validate model behavior against RTL, debug discrepancies, and support pre-silicon verification flows - Develop model-based test infrastructure: regression suites, RTL correlation checks, and coverage-driven testing - Contribute to performance modeling efforts - building cycle-approximate models that help architects evaluate design trade-offs before RTL exists - Improve modeling methodology and infrastructure: how models are structured, integrated, tested, and released to DV and architecture teams - Collaborate with chip architects to understand upcoming designs and plan modeling work ahead of RTL availability Why this role is interesting: - Your models are used to verify silicon before it's built - bugs you catch save months of schedule and millions of dollars - You'll work at the intersection of software engineering and chip design, with deep visibility into how custom ML accelerators are architected - As the team scales, there's a clear path into architectural modeling -

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