Senior CAD Manager — RTL-to-GDS Methodology & Infrastructure, Annapurna Labs

Benefits

Parental leave

6 weeks From the posting source checked Jun 20, 2026

Non-birth-parent leave

6 weeks From the posting source checked Jun 20, 2026

Family-building benefits

• Fertility benefits: Offered From the posting source checked Jun 20, 2026
• Adoption assistance: Offered From the posting source checked Jun 20, 2026
• Surrogacy assistance: Not verified

Mental health support

Offered From the posting source checked Jun 20, 2026

Relocation assistance

Not verified

Childcare support

Offered From the posting source checked Jun 20, 2026

Learning budget

Not verified

Verification

Source-linked checked Jun 7, 2026

Salary

$240K-$324K From the posting source checked Jun 20, 2026

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

142% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Senior From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Company stage

Public-company From the posting source checked Jun 20, 2026

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Senior CAD Manager — RTL-to-GDS Methodology & Infrastructure, Annapurna Labs Cupertino, California, USA Annapurna Labs is hiring a Senior CAD Manager to build, lead, and scale the CAD/EDA organization driving RTL-to-GDS methodology, flow development, and analytics across multiple sites. This is a strategic leadership role responsible for defining the multi-year roadmap for digital implementation, signoff, and physical verification; building and scaling a geographically distributed CAD team; and partnering with design, DV, IT, and EDA vendors to enable next-generation SoC tape-outs at advanced nodes (5 nm / 3 nm / 2 nm and below). You will own the technical direction and operational health of the full digital backend toolchain - synthesis, place-and-route, STA, power/IR, EM, and physical verification - along with the license, dashboard, and automation infrastructure that supports it. Success in this role means a CAD organization that materially accelerates time-to-tape-out, raises PPA and signoff quality, and gives engineering leadership data-driven visibility into project health. Key job responsibilities Define and drive the multi-year roadmap for RTL-to-GDS flows across synthesis, place-and-route, STA, signoff, and physical verification; lead methodology bring-up for new technology nodes, foundry PDKs, and IP integration. Own the EDA tool strategy and vendor relationships; lead structured evaluations, benchmarking, license forecasting, peak-load planning, and cost optimization in partnership with procurement and finance. Build and scale the CAD environment - flow frameworks, regression infrastructure, run management, release engineering, CI/CD-style practices, and version control supporting multiple technology nodes. Own the strategy for CAD dashboards and analytics: PPA tracking, run health, signoff QoR

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