ML Compiler Engineer II - Neuron Kernel Interface , Annapurna Labs
Amazon - Seattle, Washington, USA
Posted Aug 8, 2025
Benefits
- Parental leave
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- Non-birth-parent leave
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- Family-building benefits
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- Fertility benefits: Not verified
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- Mental health support
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- Relocation assistance
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- Childcare support
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- Learning budget
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- Salary
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- 401(k) match
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Schedule
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- Weekend work
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Application
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- Deadline
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Where they hire
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About this role
ML Compiler Engineer II - Neuron Kernel Interface , Annapurna Labs Seattle, Washington, USA The AWS Neuron Compiler team is actively seeking skilled compiler engineers to join our efforts in developing a state-of-the-art deep learning compiler stack. This stack is designed to optimize application models across diverse domains, including Large Language and Vision, originating from leading frameworks such as PyTorch, TensorFlow, and JAX. Your role will involve working closely with our custom-built Machine Learning accelerators, including Inferentia/Trainium, which represent the forefront of AWS innovation for advanced ML capabilities, powering solutions like Generative AI. Key job responsibilities As a ML Compiler Engineer II on the Neuron Compiler Automated Reasoning Group, you will develop and maintain tooling for best-in-class technology for raising the bar of the Neuron Compiler's accuracy and reliability. You will help lead the efforts building fuzzers and specification synthesis tooling for our LLVM-based compiler. You will work in a team with a science focus, and strive to push what we do to the edge of what is known, to best deliver our customers. Strong software development skills using C++/Python are critical to this role. A science background in compiler development is strongly preferred. A background in Machine Learning and AI accelerators is preferred, but not required. In order to be considered for this role, candidates must be currently located or willing to relocate to Seattle (Preferred), Cupertino, Austin, or Toronto. Basic Qualifications: - 3+ years of leading design or architecture (design patterns, reliability and scaling) of new and existing
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