HBM Validation Engineer, Annapurna Labs

Benefits

Parental leave

6 weeks From the posting source checked Jun 20, 2026

Non-birth-parent leave

6 weeks From the posting source checked Jun 20, 2026

Family-building benefits

• Fertility benefits: Offered From the posting source checked Jun 20, 2026
• Adoption assistance: Offered From the posting source checked Jun 20, 2026
• Surrogacy assistance: Not verified

Mental health support

Offered From the posting source checked Jun 20, 2026

Relocation assistance

Not verified

Childcare support

Offered From the posting source checked Jun 20, 2026

Learning budget

Not verified

Verification

Source-linked checked Jun 7, 2026

Salary

$136K-$184K From the posting source checked Jun 20, 2026

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

37% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Mid From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Company stage

Public-company From the posting source checked Jun 20, 2026

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

HBM Validation Engineer, Annapurna Labs Austin, Texas, USA Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. We are seeking an HBM/DDRx validation expert with a heavy focus on validation of AWS next generation ML Chips, Cards and server integration. As a member of our memory team, you will have the opportunity to participate in the execution of HBM across all Trainium platforms, with the goal of improving the characteristics of HBM for our world leading Trainium AI servers. Our HBM engineers need to independently work with vendors, understand the settings, write/modify tests, debug and collect data in the fleet. Key job responsibilities As a member of the team, you will join a mixed group of hardware and software engineers working to design, integrate, and innovate the next generation of machine learning chips into Trainium servers. In this position it is expected that you will: * Collaborate with architects, design teams, and software engineers on our next generation ML chips * Support on-going debug and operations of previous ML chips within manufacturing and the data center * Dive deep into IP integration, packaging, silicon bring up, characterization, and validation of our HBM subsystems * Independently develop the

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