Synopsys jobs

DevOps Engineer (SME) Bethesda, MD posted: Posted 30+ Days Ago

Senior Software Engineer, Speech MLOps Cracow, Lesser Poland Voivodeship, POL Want to work on the technology powering GenAI experiences via Alexa and AWS Polly? Join our Machine Learning Operations team for AGI at Amazon! We build and maintain the infrastructure and tooling that enable our Scientists to work on state-of-the-art models. We own the entire machine learning lifecycle, including: data preparation, model training, inference, evaluation, release and deployment. Specifically, we are seeking a passionate Machine Learning Engineer who is: 1) capable of designing and building scalable, reliable ML infrastructure on AWS, solving novel engineering challenges when no textbook solutions exist; 2) eager to collaborate with Scientists to understand their workflows and bring research innovations into production-ready systems. If you thrive in ambiguous environments at the intersection of software engineering and machine learning, this position is for you! Join us and be part of the team shaping the future of speech synthesis, enabling new and exciting GenAI experiences for millions of users worldwide. Basic Qualifications: - BS in Computer Science or equivalent experience. - Proficiency in at least one modern programming language (Java, C/C++, C#). - Experience with Linux/Unix systems and fluent shell interaction. - Solid knowledge of CS fundamentals (algorithms, data structures). - Professional communication skills and ability to contribute to team discussions English language working proficiency. - Experience working along a science team to accelerate development. Preferred Qualifications: - MLOps experience. Amazon is an equal opportunities employer. We believe passionately that employing a diverse workforce is central to our

Principal Engineer, ServerOps, EMEA and APAC Dublin, Ireland The Server Operations team is responsible for keeping the servers, networks, and logistics processes in Google's global fleet of data centers running smoothly and efficiently. The team installs, commissions, operates and maintains some of the most sophisticated systems equipment in the world. We strive to be creative, team-oriented technicians and managers working on a daily basis to operate systems in Google's data centers that are changing computing. Google is seeking a Principal Engineer who will be responsible for setting the overall technical direction for ServerOps, driving innovation and ensuring the reliability and scalability of server operations. You will partner with Platform and Prod Ops leaders to ensure the product hardware roadmap and features are compatible and support product deployability, serviceability and fleet maintenance in all data center designs while balancing cost, efficiency, and technology innovation. As the overall ServerOps Technical Lead, you'll build collaborative bridges across Google, including Platform Engineering, Fleet Management, Tech Writing, and multiple engineering organizations. Google continuously innovates on the designs of the server, storage, and networking hardware. While performance of the hardware is key, our ability to quickly deploy the hardware at scale in Google's own and third-party data centers is key to our agility. Once deployed, the ability of our ServerOps teams is to repair, maintain, upgrade, move, and decommission the hardware that is critical to the efficiency of our deployed fleet, effectiveness of our data center technicians, and directly impacts our customer experience. Behind everything our

Senior Associate, Cloud FinOps Engineer Greece-Thessaloniki Chortiatis posted: Posted 2 Days Ago

(Mid/Senior) DevOps for Open-Source project Gardener, Community Enablement team Region Europe | Country Bulgaria | Internal Posting Location Sofia We help the world run better At SAP, we keep it simple: you bring your best to us, and we'll bring out the best in you. We're builders touching over 20 industries and 80% of global commerce, and we need your unique talents to help shape what's next. The work is challenging - but it matters. You'll find a place where you can be yourself, prioritize your wellbeing, and truly belong. What's in it for you? Constant learning, skill growth, great benefits, and a team that wants you to grow and succeed. This is growth, not replacement. We're not just offering a job, we're inviting you to shape the future of cloud-native infrastructure at SAP and in all of Europe. We have committed to open source by donating our projects into the neutral NeoNephos foundation. Make your mark, invite others, and discover #SAPEUAICloudCareers. Let's build what's next together. Gardener powers SAP's global landscape and is trusted as the foundation for countless enterprise workloads at SAP and outside. We adopt the Kubernetes open-source system for automating deployment, scaling, and management of containerized SAP solutions and business applications. We provide solutions to run and orchestrate Kubernetes clusters on public cloud, hybrid or SAP-owned infrastructures for a variety of enterprise use cases inside and outside of SAP. The Enablement Team works in lockstep with management, project managers, and developers to make Gardener adoption seamless

Sr. DevOps Engineer Bethesda, MD posted: Posted 30+ Days Ago

Architecte Senior Software - MLOps Montpellier posted: Posted 30+ Days Ago

DevOps Engineers - Poly required Annapolis Junction, MD posted: Posted 30+ Days Ago

DevOps Engineer 2223 Chester House Farnborough Aerospace Centre Farnborough UK posted: Posted 30+ Days Ago

Domain Consultant SecOps 2 Locations posted: Posted 17 Days Ago

SME DevOps Engineer 3 Locations posted: Posted 23 Days Ago

Junior DevOps Engineer 2 Locations posted: Posted 10 Days Ago

​​Senior MLOps Engineer​ 2 Locations posted: Posted 30+ Days Ago

Silicon SoC DFT Technical Lead, Google Cloud Bengaluru, Karnataka, India In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving team behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Define and document the comprehensive DFT architecture for multi-core SoCs, including strategies for hierarchical scan compression, Memory BIST (MBIST) for huge memory instances, functional BISTs, Analog components, logic BIST, high-speed I/O loopback, and

Transportation Specialist I, ROC Bengaluru, Karnataka, IND About Amazon ROC (Relay Operation Centre): Join a team that offers best learning opportunities and work experience in transportation execution, supply chain and operations management. A place where you can start/restart/advance your career and progress to leadership roles at Amazon. ROC (Relay Operation Center) is the central command and control center for 'Transportation Execution' across the Amazon Supply Chain network supporting multiple geographies like NA and EU. It ensures hassle free, timely pick-up and delivery of freight from vendors to Amazon fulfillment centers (FC) and from Amazon FCs to carrier hubs. In case of any exceptions, ROC steps in to resolve the issue and keeps all the stakeholders informed on the proceedings. In addition to support provided for ATS organization This organization supports externalization of ROC capabilities to external shippers and vendors. Along with this tactical problem-solving ROC is also charged with understanding trends in network exceptions and then automating processes or proposing process changes to streamline operations. This second aspect involves network monitoring and significant analysis of network data. Overall, ROC plays a critical role in ensuring the smooth functioning of Amazon transportation network and thereby has a direct impact on Amazon's ability to serve its customers on time. Location: Bangalore, KA IND Hours of Operation/Shift Timings: Rotational shifts (Position involves rotational shifts to support 24/7 operations. Schedule accommodations will be considered based on individual needs Medium of support: Multi-mode (Voice and non-voice) A synopsis of a 'Transportation Specialist' role: A Transportation

SoC DFT Engineer, Google Cloud Sunnyvale, CA, USA In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a DFT Engineer you will be responsible for defining, implementing and deploying advanced Design-for-Test (DFT) methodologies including scan, MBIST, JTAG and iJTAG, for highly digital or mixed-signal chips or IPs. You will define silicon test strategies, DFT/DFD architecture, and create DFT and debug specifications for next generation SoCs. In partnership with the Silicon Engineering team, you will also be responsible for diagnosing memory and logic failures, increasing production quality, and enhancing yield and reducing test cost. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build

Sr. Physical Design Engineer, Annapurna Labs Cupertino, California, USA Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, Trainium Systems (our custom designed machine learning inference and training datacenter servers). Our success depends on our world-class server infrastructure; we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs. Key job responsibilities - Work with RTL/logic designers to drive architectural feasibility studies, explore power-performance-area tradeoffs for physical design closure - Drive IO/Core subsystem/block physical implementation through synthesis, floor planning, bus / pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off - Develop physical design methodologies - Evaluate 3rd party IP and provide recommendations - Be a highly-valued member of our start-up like team through excellent collaboration and teamwork with other physical design engineers as well as

Senior CAD Engineer, ASIC Development Infrastructure, RTL Design Boise, Idaho, USA Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced innovative devices like Fire tablets, Fire TV and Amazon Echo. What will you help us create? The Role: As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development team that is creating the semiconductor designs which will power millions of new Amazon devices. You will work closely with multi-disciplinary groups including Design, Verification, Physical Design, and Emulation teams to build and maintain a leading-edge ASIC development infrastructure that enables and accelerates their work. Key job responsibilities * Design and maintain ASIC development flows spanning RTL-to-GDSII, including RTL generation, simulation, synthesis, place & route, timing analysis, DRC/LVS, and sign-off * Deploy and configure EDA tools from vendors (Synopsys, Cadence, Mentor/Siemens, etc.) across compute infrastructure * Develop automation and CI/CD/regression to streamline design tasks, reduce manual effort, and improve consistency * Troubleshoot tool issues and work with vendors to resolve bugs, performance bottlenecks, or licensing problems * Work with IT teams to optimize compute and storage strategies to enhance engineering efficiency * Create and maintain documentation for tool usage, flow methodologies, and best practices * Utilization of AI tools to accelerate troubleshooting and monitoring of design flows A day in the life Your day starts

Physical Design Technical Lead, ASIC, TPU Sunnyvale, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's Tensor Processing Units (TPUs) are incredibly complex, pushing the boundaries of physical design, power, and performance. In this role, you will provide technical leadership for the physical design of our next-generation AI silicon. Because of the sheer scale of our chips, our physical design leadership is highly dynamic; you will be expected to drive end-to-end execution with a scope that scales from owning highly complex, critical macro-subsystems up to overarching project-wide top-level implementation, depending on project needs. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and

Senior Power Integrity Engineer, Platforms Infrastructure Sunnyvale, CA, USA As a Power Integrity Engineer within Platforms Infrastructure Engineering, you will play a pivotal role in developing one of the world's fastest-growing computing infrastructures. Working with a collaborative and high impact team, you will design, analyze, validate, and deliver robust and innovative power delivery network solutions at the chip, package, board, rack, and pod levels. Your work will directly shape our next generation AI hardware for AL/ML, server, networking, and storage applications. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Design system-level power delivery network solutions across silicon, substrate packaging, and printed circuit boards

FPGA Verification Engineer (Level 5) United States-Maryland-Linthicum RELOCATION ASSISTANCE: No relocation assistance available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: SCI TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Join Northrop Grumman Eastern Region Engineering Team on our continued mission to push the boundaries of possible across space systems. Enjoy a culture where your voice is valued and start contributing to our team of passionate professionals providing real-life solutions to our world's biggest challenges. We take pride in creating purposeful work and allowing our employees to grow and achieve their goals every day by Defining Possible. With our competitive pay and comprehensive benefits, we have the right opportunities to fit your life and launch your career today. Northrop Grumman Space

FPGA Verification Engineer (Level 3 or 4) United States-Maryland-Linthicum RELOCATION ASSISTANCE: No relocation assistance available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: Top Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Join Northrop Grumman Eastern Region Engineering Team on our continued mission to push the boundaries of possible across space systems. Enjoy a culture where your voice is valued and start contributing to our team of passionate professionals providing real-life solutions to our world's biggest challenges. We take pride in creating purposeful work and allowing our employees to grow and achieve their goals every day by Defining Possible. With our competitive pay and comprehensive benefits, we have the right opportunities to fit your life and launch your career today.

ASIC Physical Design Tools, Flows, Methodologies Manager Sunnyvale, CA, USA In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. In this role, you will manage and lead a team of TFM engineers responsible for the physical design flows that power our Tensor Processing Unit (TPU) products. You will guide your team in developing, deploying, and supporting a register-transfer level (RTL)-to-GDS infrastructure. You will bridge design engineering and electronic design automation (EDA) capabilities, balancing resources and managing priorities across projects, feature requests, and bug resolutions to ensure silicon delivery. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Individual pay is determined by

DFT Engineer, Google Cloud Sunnyvale, CA, USA In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a DFT Engineer, you will be responsible for defining, implementing and deploying advanced design-for-test (DFT) methodologies including Scan, MBIST, JTAG and iJTAG, for highly complex digital or mixed-signal chips or IPs. You will define DFT architecture, and create DFT flows for complex next generation SoCs in partnership with the Design and Physical Design teams. You will also be responsible for design verification of test logic, test pattern generation and debugging and test coverage issues. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From