SF Tensor jobs

Founding Product Engineer San Francisco | OnSite ABOUT SF TENSOR At The San Francisco Tensor Company, we believe the future of AI and high-performance computing depends on rethinking the entire software and infrastructure stack. Today's developers face bottlenecks across hardware, cloud, and code optimization that slow progress before ideas can reach their full potential. Our mission is to remove those barriers and make compute faster, cheaper, and universally portable. We are building a Kernel Optimizer that automatically transforms code into its most efficient form, combined with Tensor Cloud for adaptive, cross-cloud compute and Emma Lang, a new programming language for high-performance, hardware-aware computation. Together, these technologies reinvent the foundations of AI and HPC. SF Tensor is proudly backed by Susa Ventures and Y Combinator, as well as a group of angels including Max Mullen and Paul Graham as well as founders and executives of NeuraLink, Notion and AMD. We are partnering with researchers, engineers, and organizations who share our belief that the next breakthroughs in AI require breakthroughs in compute. ABOUT THE ROLE We're searching for a Founding Product Engineer who'll own the entire user-facing surface of our training platform: everything from the daily interfaces our users interact with to the systems that make it all run. This role requires taking vague features and shipping them from start to finish. We care just as much about how the product feels to use as whether it technically works. If you're someone who gets genuinely annoyed by janky animations, sloppy spacing, or

Founding GPU Compiler Engineer San Francisco | OnSite ABOUT SF TENSOR At The San Francisco Tensor Company, we believe the future of AI and high-performance computing depends on rethinking the entire software and infrastructure stack. Today's developers face bottlenecks across hardware, cloud, and code optimization that slow progress before ideas can reach their full potential. Our mission is to remove those barriers and make compute faster, cheaper, and universally portable. We are building a Kernel Optimizer that automatically transforms code into its most efficient form, combined with Tensor Cloud for adaptive, cross-cloud compute and Emma Lang, a new programming language for high-performance, hardware-aware computation. Together, these technologies reinvent the foundations of AI and HPC. SF Tensor is proudly backed by Susa Ventures and Y Combinator, as well as a group of angels including Max Mullen and Paul Graham as well as founders and executives of NeuraLink, Notion and AMD. We are partnering with researchers, engineers, and organizations who share our belief that the next breakthroughs in AI require breakthroughs in compute. ABOUT THE ROLE We're hiring a Founding GPU Compiler Engineer to build the core compilation infrastructure for our AI compiler. That means taking models from PyTorch, JAX, and TensorFlow and turning them into highly optimized binaries for large-scale AI pre-training. You'll own the entire compiler stack, from ingesting StableHLO all the way to backend code generation, and you'll work across targets like NVIDIA, AMD, Trainium, and TPU. You'll help shape our architecture, tooling, and overall engineering culture from the

Founding GPU Kernel Engineer San Francisco | OnSite ABOUT SF TENSOR At The San Francisco Tensor Company, we believe the future of AI and high-performance computing depends on rethinking the entire software and infrastructure stack. Today's developers face bottlenecks across hardware, cloud, and code optimization that slow progress before ideas can reach their full potential. Our mission is to remove those barriers and make compute faster, cheaper, and universally portable. We are building a Kernel Optimizer that automatically transforms code into its most efficient form, combined with Tensor Cloud for adaptive, cross-cloud compute and Emma Lang, a new programming language for high-performance, hardware-aware computation. Together, these technologies reinvent the foundations of AI and HPC. SF Tensor is proudly backed by Susa Ventures and Y Combinator, as well as a group of angels including Max Mullen and Paul Graham as well as founders and executives of NeuraLink, Notion and AMD. We are partnering with researchers, engineers, and organizations who share our belief that the next breakthroughs in AI require breakthroughs in compute. ABOUT THE ROLE We're looking for a Founding GPU Kernel Engineer who lives right at the boundary between hardware and software. Someone who thinks in warps, occupancy, and memory hierarchies, and can squeeze every last FLOP out of a GPU. Your job is to go deeper than anyone else. You'll hand-tune kernels to figure out what's actually possible on the hardware, and then turn that knowledge into compiler optimization passes that help every model we compile. WHAT YOU'LL DO

Founding Research Engineer, AI-Driven Compilation San Francisco | OnSite ABOUT SF TENSOR At The San Francisco Tensor Company, we believe the future of AI and high-performance computing depends on rethinking the entire software and infrastructure stack. Today's developers face bottlenecks across hardware, cloud, and code optimization that slow progress before ideas can reach their full potential. Our mission is to remove those barriers and make compute faster, cheaper, and universally portable. We are building a Kernel Optimizer that automatically transforms code into its most efficient form, combined with Tensor Cloud for adaptive, cross-cloud compute and Emma Lang, a new programming language for high-performance, hardware-aware computation. Together, these technologies reinvent the foundations of AI and HPC. SF Tensor is proudly backed by Susa Ventures and Y Combinator, as well as a group of angels including Max Mullen and Paul Graham as well as founders and executives of NeuraLink, Notion and AMD. We are partnering with researchers, engineers, and organizations who share our belief that the next breakthroughs in AI require breakthroughs in compute. ABOUT THE ROLE We're building a next-generation AI compiler that uses machine learning to optimize machine learning. As a Founding Research Engineer focused on AI-driven compilation, you'll develop the agentic and reinforcement learning systems that guide our compiler's optimization decisions. This is a research-heavy role right at the intersection of compilers and ML. You'll design learned systems that can explore huge optimization spaces, discover new code transformations, and keep improving compilation quality over time. WHAT YOU'LL DO -

Functional Analyst, Salesforce Marketing Cloud (SFMC) Sysco Corporate posted: Posted 30+ Days Ago

Filler Operator, SF-30 (5pm-5:30am) Sulphur Springs, TX posted: Posted Today

Tensor SOC Performance Design Verification Engineer Bengaluru, Karnataka, India Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Develop simulators and architectural models of Google's Tensor SOC. Collaborate with system architects, SoC and CPU/GPU/TPU architects/designers, and software and application experts to understand current and future requirements. Participate in architectural and design evaluation of Tensor SOC features studies. Perform pre-silicon performance simulation and correlate with pre and post-silicon measurements. Communicate analysis results qualitatively and quantitatively. Minimum qualifications: Master's degree in Electrical Engineering, Physics, Computer Engineering, Materials Science or related field or equivalent practical experience. 4 years of experience in the SOC design/verification. Experience verifying digital logic at the Register Transfer Level (RTL) using SystemVerilog at Subsystem or Full chip level. Experience in mobile SOC performance model development, performance analysis, and workload characterization. Preferred qualifications: Experience in CPU microarchitecture innovation. Knowledge of system software components, such as Linux, drivers, and runtime. Knowledge of performance analysis tools. Knowledge

Quantum Architecture Scientist - Tensor Networks Specialist (Intermediate to Senior) Quantum Architecture Scientist - Tensor Networks Specialist (Intermediate to Senior)

Associate SF Mumbai (NESCO), India posted:

Staff Personalization Specialist - SF and Adobe Target Bangalore (India)

Co-Op: Financial Data Engineer Remote - California, SF Bay Area posted: Posted 29 Days Ago

Lead Product Designer - Matterport - SF Bay Area US-CA San Francisco posted: Posted 30+ Days Ago

Group Product Manager, GPU/Graphics, Tensor SoC Mountain View, CA, USA; +1 more At Google, we put our users first. The world is always changing, so we need Product Managers who are continuously adapting and excited to work on products that affect millions of people every day. In this role, you will work cross-functionally to guide products from conception to launch by connecting the technical and business worlds. You can break down complex problems into steps that drive product development. One of the many reasons Google consistently brings innovative, world-changing products to market is because of the collaborative work we do in Product Management. Our team works closely with creative engineers, designers, marketers, etc. to help design and develop technologies that improve access to the world's information. We're responsible for guiding products throughout the execution cycle, focusing specifically on analyzing, positioning, packaging, promoting, and tailoring our solutions to our users. In this role, you will own and define the long-term graphics processing unit (GPU) product roadmap for Google's tensor system-on-chips (SoCs). You will be ensuring Pixel devices deliver graphics performance, gaming experiences, and GPU compute capabilities, while balancing power, performance, and area (PPA) within the mobile SoC constraints. You will drive strategy from concept to silicon, working closely with engineering, software, Pixel, and external partners. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users.

General Submissions, for any job not currently listed NYC, SF, Remote Please send us your resume if there are other roles not listed here that you believe you could be a good fit for.

Senior AI-Native Systems Software Engineer, TensorRT US, CA, Santa Clara posted: Posted 30+ Days Ago

Senior Software Engineer, Deep Learning Inference - TensorRT US, CA, Santa Clara posted: Posted 3 Days Ago

Analyst Based in SF Bay Area, but open to other U.S. locations

Welder III IN-Tamil Nadu-Coimbatore-SF No 608 Chettipalayam Road, Eachanari Post (Consolidation) posted: Posted Yesterday

Project Management Specialist IN-Tamil Nadu-Coimbatore-SF No 608 Chettipalayam Road, Eachanari Post (Consolidation) posted: Posted 3 Days Ago

Architecte et Intégrateur Plate-forme Digitale et Cybersécurité GeoDataCentre (F/H) Toulouse, Haute-Garonne, France Rejoignez notre équipe dynamique en tant qu'Architecte et Intégrateur Plate-forme Digitale et Cybersécurité. Vous serez au cœur de la transformation numérique, en définissant des architectures innovantes et en intégrant des solutions DevSecOps. Si vous êtes passionné par les technologies cloud et la cybersécurité, ce poste est fait pour vous !

Master Thesis: AI-based Analog/Mixed Signal Design (f/m/div) Padua (Padova) (Italy)

Kernel Engineer — Scientific Computing (SPU) Redwood City | OnSite Vorticity is building the world's first Scientific Processing Unit (SPU https://pyrite9.com), a new class of silicon purpose-built to accelerate scientific computing beyond the limits of GPUs. We are designing tightly coupled software-hardware systems around applied mathematics workloads to deliver order-of-magnitude performance gains. Unlocking its full potential requires early, deep engagement from applied mathematics-driven software engineers who can translate real-world scientific workloads into executable models, kernels, libraries, and applications that inform both architecture and tooling decisions. As a Kernel Engineer, you will work at the intersection of applied mathematics, scientific computing, parallel programming, and low-level performance engineering. You will help shape how numerical kernels are implemented, optimized, and eventually mapped onto the SPU. Your work may include building early numerical kernels and libraries, developing prototype applications, and writing Python-based workload models and simulators, all to support and inform the evolving hardware and compiler stack. This requires both strong applied math fundamentals and deep low-level implementation ability. You should be comfortable moving from mathematical formulations to efficient kernels, reasoning about accuracy, stability, data movement, memory hierarchy, parallel execution, and compiler behavior along the way. This position is ideal for someone who combines strong scientific computing instincts with the low-level habits of a performance engineer. RESPONSIBILITIES - Prototyping and implementing core kernels and low-level numerical primitives for the SPU. - Translating mathematical formulations into executable, performance-relevant kernel implementations. - Analyzing and optimizing me

Principal Engineer System Compute (f/m/div) Langen (Frankfurt am Main) (Germany)

Applied Math Libraries Engineer (SPU) Redwood City | OnSite Vorticity is building the world's first Scientific Processing Unit (SPU https://pyrite9.com), a new class of silicon purpose-built to accelerate scientific computing beyond the limits of GPUs. We are designing tightly coupled software-hardware systems around applied mathematics workloads to deliver order-of-magnitude performance gains. Unlocking its full potential requires early, deep engagement from applied mathematics-driven software engineers who can translate real-world scientific workloads into executable models, kernels, libraries, and applications that inform both architecture and tooling decisions. As a Applied Math Libraries Engineer, you will work at the intersection of applied mathematics, scientific computing, and low-level software. From day one, you will help build the numerical software foundation of the SPU. This role is focused on building reusable mathematical primitives rather than full end-to-end scientific applications. The ideal candidate is excited to implement mathematics on a new architecture. You will work closely with hardware architects, compiler engineers, and runtime engineers to shape how numerical algorithms are expressed, executed, and optimized on the SPU. This position is ideal for someone who enjoys moving fluidly between applied math, numerical algorithms, and low-level software, and who wants to help build a new scientific computing platform from the ground up. RESPONSIBILITIES - Prototype and implement core numerical linear algebra kernels and libraries for the SPU. - Translate mathematical algorithms into executable, performance-relevant software. - Write C, C++, and Python reference implementations to guide hardware, compiler, and runtime decisions. - Design benchmarks, correctness tests, numerical accuracy tests, and