Intel jobs

Senior CPU Performance Architect 3 Locations posted: Posted 9 Days Ago

Principal Engineer - FPGA US-NY-SKANEATELES-721 VISIONS DRIVE posted: Posted 30+ Days Ago

College Graduate 2 Locations posted: Posted 30+ Days Ago

Analog Engineer India, Bangalore posted: Posted 17 Days Ago

GPU Logic Design Engineer 2 Locations posted: Posted 30+ Days Ago

CPU Performance Engineer, Platform Architecture Austin, United States of America The CPU Platform Architecture team is responsible for pushing the boundaries of both single-threaded and multi-threaded CPU performance, to enhance the user experience of many Apple products. The team is composed of experts with deep experience in microarchitecture, ISA definition, performance modeling, power modeling, and workload analysis. We are seeking a highly motivated, innovative, and confident individual to join the CPU Platform Architecture team to help drive advanced exploration for next-generation iPhone, iPad, Mac, and server CPU designs. As a CPU Performance Engineer with a focus on the memory subsystem, you will be part of a team that is defining and optimizing CPU and cache micro-architecture. Working collaboratively, you will seek out areas of the design for improvement by identifying performance bottlenecks and evaluate ideas to address them. You will engage with experienced CPU and SoC designers in micro-architecture and RTL to assess the feasibility of ideas through modeling, refine ideas and model correlation, and seed new ideas. The role requires the analysis of single-threaded and multi-threaded workloads across existing and new product categories to identify bottlenecks and opportunities for improvement. We collaborate as a larger CPU architecture and performance team to maintain and improve the simulation environment to enable data- driven decisions and always look for ways to boost the productivity of the entire team. Minimum Qualifications: BS degree Experience in CPU and SOC architecture and micro-architecture Experience with performance simulation environments Object-oriented programming experience in C/C++ Experience in

Logistics Operations Manager 3 Locations posted: Posted Yesterday

Senior/Staff Engineer : Post Silicon- Bring Up Bengaluru, Karnataka, India; Sunnyvale, CA; Toronto, Ontario, Canada Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. The Role: In this exciting role, you will be responsible for bring up and optimizations of Cerebras's Wafer Scale Engine (WSE). Suitable candidate will have experience delivering end to end solutions working closely with teams across chip design, system performance, software development and productization. Responsibilities: - On Wafer Scale Engines, develop and debug flows that embed well tested and deployable optimizations in production processes to reduce time and costs - Work on refining AI Systems across H/W-S/W

Compiler Engineer India, Bangalore posted: Posted 30+ Days Ago

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Account Sales Japan, Tokyo posted: Posted 15 Days Ago

Business Development Manager Taiwan, Taipei posted: Posted Today

Senior IP Development Engineer 3 Locations posted: Posted 3 Days Ago

Test Module Engineer Malaysia, Kulim posted: Posted Yesterday

Advanced Technology: Compiler Engineer Sunnyvale, CA; Vancouver, British Columbia, Canada Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About The Team Cerebras builds wafer-scale AI processors-single chips delivering tens of PB/s of memory bandwidth and a dataflow architecture that accelerates at a granularity no multi-device system can match. The Advanced Technology Group (ATG) is Cerebras ' pathfinding organization. We work ahead of product to explore new architectures, demonstrate breakthrough performance on scientific and AI workloads, and shape the technical roadmap for future Cerebras hardware and software. Our work regularly appears at top-tier venues (Supercomputing, SIAM, IEEE, and NeurIPS ) and

Manufacturing Training Technician Malaysia, Kulim posted: Posted Yesterday

Senior CPU Performance Architect 3 Locations posted: Posted 30+ Days Ago

Platform Integration Engineer India, Bangalore posted: Posted Yesterday

Senior SoC Compute/Memory Subsystem Architect 6 Locations posted: Posted 2 Days Ago

RF Engineer 4 Locations posted: Posted 15 Days Ago

Senior Hardware Architect, Deep Learning GPU and System Israel, Yokneam posted: Posted 30+ Days Ago

CPU Formal Verification Engineer 5 Locations posted: Posted 16 Days Ago

Emulation Engineer India, Bangalore posted: Posted 30+ Days Ago

System FPGA & Hardware Engineer / Senior Engineer Ho Chi Minh City (Vietnam)