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  • Intel Collection Analyst

    BitSight Technologies - Remote Israel
    Indexed from Workday Benefit evidence checked Jun 7, 2026
    posted 140 days ago

    Why we showed this

    Description: "intel"Title: "intel"
    Remote From the posting source Other - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Intel Collection Analyst Remote Israel posted: Posted 30+ Days Ago

  • Cyber Threat Intel Analyst

    Leidos - Ashburn, VA
    Indexed from Workday Benefit evidence checked May 7, 2026
    posted 140 days ago

    Why we showed this

    Description: "intel"Title: "intel"
    Unspecified Other - Mid From the posting source Resolvable source Verified parental leave: 4 wksource Resolvable source Verified non-birth-parent leave: 4 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Cyber Threat Intel Analyst Ashburn, VA posted: Posted 30+ Days Ago

  • Senior Yield Enhancement Engineer

    Cerebras Systems - Sunnyvale, CA
    Indexed from Greenhouse Benefit evidence checked Jun 7, 2026 Comp disclosed in posting
    posted 224 days ago

    Why we showed this

    Description: "intel"Role: semantic match
    Unspecified Engineering From the posting source - Senior From the posting source $175K-$250K From the posting source Equity Inferred from posting 401(k) reported

    Senior Yield Enhancement Engineer Sunnyvale, CA Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. The Role : Senior Yield Enhancement Engineer We are seeking a highly experienced Senior VLSI Product and Test Engineer with 7+ years of relevant experience in Semiconductor Testing/Failure Analysis/Yield Enhancement. The successful candidate will look at ATE datalogs, understand the defects in detail, disposition wafers based on ATE data and drive FA/Yield enhancement using physical/optical inspection techniques used in FA. Suitable candidate will have depth in testing, characterization of silicon defects, failure modes, and experience delivering end-to-end solutions working closely with teams across chip design, fabrication,

  • Intel Analyst- Shift Worker

    CACI - Aurora, CO, US
    Indexed from Workday Benefit evidence checked Jun 7, 2026
    posted 124 days ago

    Why we showed this

    Description: "intel"Title: "intel"
    Unspecified Trades From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Intel Analyst- Shift Worker Aurora, CO, US posted: Posted 15 Days Ago

  • CPU Verification Engineer

    Intel - US, Texas, Austin
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 118 days ago

    Why we showed this

    Employer: "intel"Role: semantic match
    Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    CPU Verification Engineer US, Texas, Austin posted: Posted 9 Days Ago

  • Senior CIRT / Threat Intel Analyst

    S&P Global Inc. - 4 Locations
    Indexed from Workday Benefit evidence checked Jun 7, 2026
    posted 140 days ago

    Why we showed this

    Description: "intel"Title: "intel"
    Unspecified Other - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Senior CIRT / Threat Intel Analyst 4 Locations posted: Posted 30+ Days Ago

  • CPU Microarchitect/RTL Engineer - Execution, Load/Store

    Apple - Beaverton, United States of America
    Indexed from Apple Custom Benefit evidence checked Jun 13, 2026 Comp disclosed in posting
    posted 168 days ago

    Why we showed this

    Role: semantic match
    Unspecified Engineering From the posting source - Mid From the posting source $181K-$318K From the posting source Equity Inferred from posting 401(k) reported

    CPU Microarchitect/RTL Engineer - Execution, Load/Store Beaverton, United States of America Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! Apple's Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU integer, floating-point, and/or load/store execution for our performant cores. As a CPU Microarchitect/RTL Engineer, you will own or participate in the following: • Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification • RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals • Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification • Performance exploration and correlation - explore high-performance strategies and work with

  • Senior CIRT / Threat Intel Analyst

    S&P Global Inc. - London, UK
    Indexed from Workday Benefit evidence checked Jun 7, 2026
    posted 118 days ago

    Why we showed this

    Description: "intel"Title: "intel"
    Unspecified Other - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Senior CIRT / Threat Intel Analyst London, UK posted: Posted 9 Days Ago

  • Senior CPU Verification Engineer

    Intel - 2 Locations
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 140 days ago

    Why we showed this

    Employer: "intel"Role: semantic match
    Unspecified Data From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Senior CPU Verification Engineer 2 Locations posted: Posted 30+ Days Ago

  • Solutions Consultant - Intel Community

    CyberArk - Office - USA - VA - Reston
    Indexed from Workday Benefit evidence checked Jun 7, 2026
    posted 140 days ago

    Why we showed this

    Description: "intel"Title: "intel"
    Unspecified Data From the posting source - Mid From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Inferred from posting 401(k) reported

    Solutions Consultant - Intel Community Office - USA - VA - Reston posted: Posted 30+ Days Ago

  • Business Development Executive - Intel Enterprise IT Operations

    CACI - Remote (Any State)
    Indexed from Workday Benefit evidence checked Jun 7, 2026
    posted 116 days ago

    Why we showed this

    Description: "intel"Title: "intel"
    Remote From the posting source Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Business Development Executive - Intel Enterprise IT Operations Remote (Any State) posted: Posted 7 Days Ago

  • Senior CPU Performance Architect

    NVIDIA Corporation - 3 Locations
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 130 days ago

    Why we showed this

    Role: semantic match
    Unspecified Engineering From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Senior CPU Performance Architect 3 Locations posted: Posted 21 Days Ago

  • Senior Manager, Threat Intel Analyst

    NXP Semiconductors - Austin (Oakhill, Office)
    Indexed from Workday Benefit evidence checked May 7, 2026
    posted 140 days ago

    Why we showed this

    Description: "intel"Title: "intel"
    Unspecified Other - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Senior Manager, Threat Intel Analyst Austin (Oakhill, Office) posted: Posted 30+ Days Ago

  • Senior CPU Design Engineer- FE Integration and FE Flow

    Intel - India, Bangalore
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 140 days ago

    Why we showed this

    Employer: "intel"Role: semantic match
    Unspecified Data From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Senior CPU Design Engineer- FE Integration and FE Flow India, Bangalore posted: Posted 30+ Days Ago

  • Business Development Executive - Intel Enterprise IT Modernization

    CACI - Remote (Any State)
    Indexed from Workday Benefit evidence checked Jun 7, 2026
    posted 116 days ago

    Why we showed this

    Description: "intel"Title: "intel"
    Remote From the posting source Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Business Development Executive - Intel Enterprise IT Modernization Remote (Any State) posted: Posted 7 Days Ago

  • Advanced Technology: R&D Engineer - AI/ML, HPC

    Cerebras Systems - Sunnyvale, CA; Toronto, Ontario, Canada; Vancouver, British Columbia, Canada
    Indexed from Greenhouse Benefit evidence checked Jun 7, 2026
    posted 175 days ago

    Why we showed this

    Description: "intel"Role: semantic match
    Unspecified Engineering From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reported

    Advanced Technology: R&D Engineer - AI/ML, HPC Sunnyvale, CA; Toronto, Ontario, Canada; Vancouver, British Columbia, Canada Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About The Team Cerebras builds wafer-scale AI processors-single chips delivering tens of PB/s of memory bandwidth and a dataflow architecture that accelerates at a granularity no multi-device system can match. The Advanced Technology Group (ATG) is Cerebras ' pathfinding organization. We work ahead of product to explore new architectures, demonstrate breakthrough performance on scientific and AI workloads, and shape the technical roadmap for future Cerebras hardware and software. Our work regularly appears at top-tier venues (Supercomputing,

  • CPU Design Verification Engineer

    Intel - 2 Locations
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 132 days ago

    Why we showed this

    Employer: "intel"Role: semantic match
    Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    CPU Design Verification Engineer 2 Locations posted: Posted 23 Days Ago

  • Solutions Consultant 2 - Intel Community

    CyberArk - Arlington, United States of America
    Indexed from Workday Benefit evidence checked Jun 7, 2026
    posted 133 days ago

    Why we showed this

    Description: "intel"Title: "intel"
    Unspecified Data From the posting source - Mid From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Inferred from posting 401(k) reported

    Solutions Consultant 2 - Intel Community Arlington, United States of America posted: Posted 24 Days Ago

  • Principal Product Manager, Threat Intel Platform - ETM

    Qualys Inc - Foster City
    Indexed from Workday Benefit evidence checked Jun 7, 2026
    posted 139 days ago

    Why we showed this

    Description: "intel"Title: "intel"
    Unspecified Product From the posting source - Staff Plus From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Principal Product Manager, Threat Intel Platform - ETM Foster City posted: Posted 30 Days Ago

  • Systems and Hardware Enabling Engineer

    Intel - India, Bangalore
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 140 days ago

    Why we showed this

    Employer: "intel"Role: semantic match
    Unspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Systems and Hardware Enabling Engineer India, Bangalore posted: Posted 30+ Days Ago

  • CPU Power Management Microarchitect/RTL Engineer

    Apple - Santa Clara, United States of America
    Indexed from Apple Custom Benefit evidence checked Jun 13, 2026 Comp disclosed in posting
    posted 167 days ago

    Why we showed this

    Role: semantic match
    Unspecified Engineering From the posting source - Mid From the posting source $147K-$272K From the posting source Equity Inferred from posting 401(k) reported

    CPU Power Management Microarchitect/RTL Engineer Santa Clara, United States of America Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! Apple's Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for world-class CPU power management solutions. As a CPU Power Management Microarchitect/RTL Engineer, you will own or contribute to the following: • Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification • RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals • Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification • Performance exploration and correlation - explore high-performance strategies and work with the performance verification

  • Chief of Staff to the Managing Director – Intel Customer Support

    Applied Materials - 2 Locations
    Indexed from Workday Benefit evidence checked Jun 13, 2026
    posted 118 days ago

    Why we showed this

    Description: "intel"Title: "intel"
    Unspecified Customer Success From the posting source - Staff Plus From the posting source Salary not disclosed Equity Inferred from posting 401(k) reported

    Chief of Staff to the Managing Director – Intel Customer Support 2 Locations posted: Posted 9 Days Ago

  • CoDesign & NextGen - New College Grad

    Cerebras Systems - Sunnyvale, CA
    Indexed from Greenhouse Benefit evidence checked Jun 7, 2026 Comp disclosed in posting
    posted 265 days ago

    Why we showed this

    Description: "intel"Role: semantic match
    Unspecified Engineering From the posting source - Mid From the posting source $145K-$155K From the posting source Equity Inferred from posting 401(k) reported

    CoDesign & NextGen - New College Grad Sunnyvale, CA Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About The Role Engineers in the CoDesign and NextGen organization work at the interface of software and hardware helping everything from high performance kernel design, next generation ASIC performance modeling and tuning, new system bringup and software tuning, system robustness and simulations. As an new engineer you'll be expected to learn the Cerebras products and platforms end to end starting at the base layer of programming the Wafer Scale Engine through kernel development, modeling performance for our software products and validating the work

  • System Debug Engineer

    Supermicro - Country Taiwan | City Bade
    Indexed from Successfactors
    posted 109 days ago

    Why we showed this

    Description: "intel"
    Unspecified Engineering From the posting source - Senior From the posting source Salary not disclosed Equity

    System Debug Engineer Country Taiwan | City Bade Job Req ID: 27426 Job Summary: We are looking for a Sr. System Debug Engineer to debug and to support customer and other internal deparmtnets for solving puter system issues. In this role, you will work with other departments and provide solutions for the issues and product quality improvement. The ideal candidate should be familiar with Intel low level debugging. Experience using Intel Target Probe (ITP) tool is a plus. Essential Duties and Responsibilities: Diagnose the root cause of server system failures and isolate the components/failure nodes Interface with RD, System teams, and customer support to improve Supermicro products quality in early DVT/PVT stage Develop and publish test reports and communicate findings to other team members Using software to improve testing techniques / procedures for analyzing system failure data efficiently Support product technology know-how & troubleshooting skills transfer to Production from PVT to MP stage Qualifications: Bachelor of Science in Electrical Engineering with minimum 3 years of working experience preferred Proficient in Linux and Windows OS Lab and debug skills are required, including experience working with and analyzing output from test equipment such as digital multi-meter and oscilloscopes, along with soldering and debugging skills Strong problem-solving capability Familiar with Intel ITP/DCI and Intel CPUs & Chipset architecture or AMD CPU/GPU & Chipset architecture is a plus EEO Statement Supermicro is an Equal Opport

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