NXP Semiconductors jobs
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Sr Director Product Marketing
NXP Semiconductors - Chandler (Office)Indexed from Workday Benefit evidence checked May 7, 2026posted 82 days agoWhy we showed this
Employer: "semiconductors"Employer: "nxp"Unspecified Marketing From the posting source - Staff Plus From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSr Director Product Marketing Chandler (Office) posted: Posted 9 Days Ago
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PRTM Product Manager - R&D IT
NXP Semiconductors - BangaloreIndexed from Workday Benefit evidence checked May 7, 2026posted 104 days agoWhy we showed this
Employer: "nxp"Employer: "semiconductors"Unspecified Product From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedPRTM Product Manager - R&D IT Bangalore posted: Posted 30+ Days Ago
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Senior Logic Design Engineer, Cache Coherent Interconnects
NVIDIA Corporation - 2 LocationsIndexed from Workday Benefit evidence checked Jun 13, 2026posted 104 days agoWhy we showed this
Role: semantic matchUnspecified Data From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedSenior Logic Design Engineer, Cache Coherent Interconnects 2 Locations posted: Posted 30+ Days Ago
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Sr DFT Engineer (eInfochips Inc)
Arrow Electronics - Remote, CA 95051, California, United States of AmericaIndexed from Phenom People Benefit evidence checked Jun 7, 2026posted 74 days agoWhy we showed this
Role: semantic matchRemote From the posting source Engineering From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedSr DFT Engineer (eInfochips Inc) Remote, CA 95051, California, United States of America Join our team as a Senior DFT Engineer and drive innovation in semiconductor design. Leverage your expertise in DFT implementation, debugging, and advanced simulation tools to ensure top-quality designs. Collaborate with cross-functional teams and work on cutting-edge projects with global impact. Shape the future of technology with us!
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Manufacturing Engineering & Project Manager
NXP Semiconductors - Kuala LumpurIndexed from Workday Benefit evidence checked May 7, 2026posted 104 days agoWhy we showed this
Employer: "semiconductors"Employer: "nxp"Unspecified Data From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedManufacturing Engineering & Project Manager Kuala Lumpur posted: Posted 30+ Days Ago
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Software Security Architect (m/f/d)
NXP Semiconductors - 4 LocationsIndexed from Workday Benefit evidence checked May 7, 2026posted 104 days agoWhy we showed this
Employer: "semiconductors"Employer: "nxp"Unspecified Engineering From the posting source - Mid From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSoftware Security Architect (m/f/d) 4 Locations posted: Posted 30+ Days Ago
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FPGA Engineer Staff
Plexus Corp - Penang, MalaysiaIndexed from Eightfold Benefit evidence checked Jun 13, 2026posted 72 days agoWhy we showed this
Role: semantic matchUnspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedFPGA Engineer Staff Penang, Malaysia
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ML OPS Engineer - R&D IT
NXP Semiconductors - BangaloreIndexed from Workday Benefit evidence checked May 7, 2026posted 104 days agoWhy we showed this
Employer: "semiconductors"Employer: "nxp"Unspecified Data From the posting source - Mid From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedML OPS Engineer - R&D IT Bangalore posted: Posted 30+ Days Ago
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InP Product Engineering Tech
Coherent Corp. - Sherman, TX, United StatesIndexed from Oracle Recruiting Cloud Benefit evidence checked Jun 13, 2026posted 104 days agoWhy we showed this
Role: semantic matchUnspecified Product From the posting source - Mid From the posting source Salary not disclosed Inferred from posting Childcare support Equity Inferred from posting 401(k) reportedInP Product Engineering Tech Sherman, TX, United States We are seeking a highly motivated Product Engineering technician to support the rapid ramp‑up of next‑generation InP optoelectronic devices for datacom applications. In this role, you will be responsible for monitoring and improving yield performance across the entire manufacturing flow-including front‑end and back‑end wafer fabrication, die‑level electrical and optical testing, visual inspection, wafer acceptance testing, and subsequent reliability or parametric evaluations. Success in this role requires strong analytical capabilities, including the ability to perform data queries, precise inspection review, and first level commonality studies to support effective troubleshooting and continuous yield improvement. The ideal candidate is detail‑oriented, data‑driven, and thrives in a fast‑paced environment focused on advanced photonics technology.
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Sales Account Manager – Automotive Tier1
NXP Semiconductors - NoviIndexed from Workday Benefit evidence checked May 7, 2026posted 84 days agoWhy we showed this
Employer: "nxp"Employer: "semiconductors"Unspecified Trades From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSales Account Manager – Automotive Tier1 Novi posted: Posted 11 Days Ago
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Principal Engineer, ASIC Development Engineering (Analog and Mixed Signal Design, PLL, Oscillator)
SanDisk - Bengaluru, KA, IndiaIndexed from Smartrecruitersposted 75 days agoWhy we showed this
Role: semantic matchUnspecified Data From the posting source - Staff Plus From the posting source Salary not disclosed EquityPrincipal Engineer, ASIC Development Engineering (Analog and Mixed Signal Design, PLL, Oscillator) Bengaluru, KA, India Company Description: Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description: Work as one of the senior team members or as lead of analog IPs and deliver analog blocks on-time with state-of-the-art architecture to meet the overall product requirements Work closely with team in designing and delivering analog blocks Design analog modules from scratch Handling assigned tasks independently Pro-actively get design issues/problems resolved Contribute to or propose innovative design solutions and design methodologies Work closely with
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Senior Analog Layout Engineer
Infineon Technologies - Penang (Malaysia)Indexed from Eightfold Benefit evidence checked Jun 7, 2026posted 72 days agoWhy we showed this
Role: semantic matchUnspecified Data From the posting source - Senior From the posting source Salary not disclosed Inferred from posting 401(k) reportedSenior Analog Layout Engineer Penang (Malaysia)
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Electronics Engineer (Networks)
Northrop Grumman Corporation - United States-California-San DiegoIndexed from Eightfold Benefit evidence checked Jun 7, 2026posted 72 days agoWhy we showed this
Role: semantic matchUnspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedElectronics Engineer (Networks) United States-California-San Diego
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Principal AI Compiler Engineer
NXP Semiconductors - 2 LocationsIndexed from Workday Benefit evidence checked May 7, 2026posted 99 days agoWhy we showed this
Employer: "semiconductors"Employer: "nxp"Unspecified Data From the posting source - Staff Plus From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedPrincipal AI Compiler Engineer 2 Locations posted: Posted 26 Days Ago
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Analog/mixed-signal IC Developer - Acacia (Hybrid)
ThousandEyes - Ottawa, Ontario, CanadaIndexed from Phenom Peopleposted 146 days agoWhy we showed this
Role: semantic matchHybrid - 2d office From the posting source Engineering From the posting source - Mid From the posting source Salary not disclosedAnalog/mixed-signal IC Developer - Acacia (Hybrid) Ottawa, Ontario, Canada Join our team as a Hardware Technical Leader, where you will drive innovation and lead cross-functional teams in developing next-generation hardware products. If you have a passion for technology and a strong background in hardware engineering, we want to hear from you!
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System Architecture Director - MPU& MCU
NXP Semiconductors - 2 LocationsIndexed from Workday Benefit evidence checked May 7, 2026posted 104 days agoWhy we showed this
Employer: "semiconductors"Employer: "nxp"Unspecified Other - Staff Plus From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSystem Architecture Director - MPU& MCU 2 Locations posted: Posted 30+ Days Ago
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FPGA Design Engineer
Northrop Grumman Corporation - United States-Illinois-Rolling MeadowsIndexed from Eightfold Benefit evidence checked Jun 7, 2026posted 72 days agoWhy we showed this
Role: semantic matchUnspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedFPGA Design Engineer United States-Illinois-Rolling Meadows
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Internship: Python Tooling & Embedded Systems (C) (m/f/d)
NXP Semiconductors - GratkornIndexed from Workday Benefit evidence checked May 7, 2026posted 73 days agoWhy we showed this
Employer: "nxp"Employer: "semiconductors"Unspecified Engineering From the posting source - Entry From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedInternship: Python Tooling & Embedded Systems (C) (m/f/d) Gratkorn posted: Posted Today
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Technologist | III V Semiconductor Technology | Process Development (InP & GaAs)
Coherent Corp. - Sherman, TX, United StatesIndexed from Oracle Recruiting Cloud Benefit evidence checked Jun 13, 2026posted 90 days agoWhy we showed this
Role: semantic matchUnspecified Engineering From the posting source - Principal From the posting source Salary not disclosed Inferred from posting Childcare support Equity Inferred from posting 401(k) reportedTechnologist | III V Semiconductor Technology | Process Development (InP & GaAs) Sherman, TX, United States Job Summary: We're looking for a Senior Principal Technologist to lead development of next generation process nodes for Indium Phosphide (InP) and Gallium Arsenide (GaAs) semiconductor technologies. This is a high impact technical leadership role working across cross functional engineering teams and external equipment and material vendors to enable advanced device performance and scalable III V wafer manufacturing.
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Senior Principle Project Manager (NPI)
NXP Semiconductors - 2 LocationsIndexed from Workday Benefit evidence checked May 7, 2026posted 75 days agoWhy we showed this
Employer: "semiconductors"Employer: "nxp"Unspecified Operations From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSenior Principle Project Manager (NPI) 2 Locations posted: Posted 2 Days Ago
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Senior Chip Design Engineer
NVIDIA Corporation - Israel, Tel AvivIndexed from Workday Benefit evidence checked Jun 13, 2026posted 75 days agoWhy we showed this
Role: semantic matchUnspecified Data From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedSenior Chip Design Engineer Israel, Tel Aviv posted: Posted 2 Days Ago
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Facilities O&M Supervisor - Nights
NXP Semiconductors - Chandler (Manufacturing)Indexed from Workday Benefit evidence checked May 7, 2026posted 104 days agoWhy we showed this
Employer: "semiconductors"Employer: "nxp"Unspecified Operations From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedFacilities O&M Supervisor - Nights Chandler (Manufacturing) posted: Posted 30+ Days Ago
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Senior Design Engineer, Coherent High Speed Interconnect
NVIDIA Corporation - US, CA, Santa ClaraIndexed from Workday Benefit evidence checked Jun 13, 2026posted 75 days agoWhy we showed this
Role: semantic matchUnspecified Data From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedSenior Design Engineer, Coherent High Speed Interconnect US, CA, Santa Clara posted: Posted 2 Days Ago
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Principal Field Application Engineer - Automotive MCU
NXP Semiconductors - ShenzhenIndexed from Workday Benefit evidence checked May 7, 2026posted 104 days agoWhy we showed this
Employer: "nxp"Employer: "semiconductors"Unspecified Data From the posting source - Staff Plus From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedPrincipal Field Application Engineer - Automotive MCU Shenzhen posted: Posted 30+ Days Ago
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