NXP Semiconductors jobs
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Equipment Engineer ECHO Fab
NXP Semiconductors - Chandler (Office)Indexed from Workday Benefit evidence checked May 7, 2026posted 74 days agoWhy we showed this
Employer: "semiconductors"Employer: "nxp"Unspecified Data From the posting source - Mid From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedEquipment Engineer ECHO Fab Chandler (Office) posted: Posted 3 Days Ago
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Senior Program Manager - Advanced Power System
NXP Semiconductors - Seoul (Jung-gu)Indexed from Workday Benefit evidence checked May 7, 2026posted 102 days agoWhy we showed this
Employer: "nxp"Employer: "semiconductors"+1
Unspecified Operations From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSenior Program Manager - Advanced Power System Seoul (Jung-gu) posted: Posted 30+ Days Ago
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Embedded Engineer-UEFI (eInfochips)
Arrow Electronics - Redmond, Washington, United States of AmericaIndexed from Phenom People Benefit evidence checked Jun 7, 2026posted 108 days agoWhy we showed this
Role: semantic matchOnsite - 5d office From the posting source Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedEmbedded Engineer-UEFI (eInfochips) Redmond, Washington, United States of America Join our team as a Senior Embedded Engineer - UEFI and drive innovation in device driver development. Collaborate with top engineers, leverage cutting-edge SoC architectures, and integrate AI-driven solutions to enhance product quality and productivity. Shape the future of embedded systems with eInfochips in a dynamic, onsite environment.
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Senior Principal Power Architect - MCU
NXP Semiconductors - 4 LocationsIndexed from Workday Benefit evidence checked May 7, 2026posted 72 days agoWhy we showed this
Employer: "nxp"Employer: "semiconductors"Unspecified Engineering From the posting source - Staff Plus From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedSenior Principal Power Architect - MCU 4 Locations posted: Posted Yesterday
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Silicon Photonics TD Process/Product Integration Engineer
Intel - US, New Mexico, AlbuquerqueIndexed from Workday Benefit evidence checked Jun 13, 2026posted 100 days agoWhy we showed this
Role: semantic matchUnspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedSilicon Photonics TD Process/Product Integration Engineer US, New Mexico, Albuquerque posted: Posted 29 Days Ago
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Internship: Software Developer - Tools (m/f/d)
NXP Semiconductors - GratkornIndexed from Workday Benefit evidence checked May 7, 2026posted 96 days agoWhy we showed this
Employer: "nxp"Employer: "semiconductors"Unspecified Engineering From the posting source - Entry From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedInternship: Software Developer - Tools (m/f/d) Gratkorn posted: Posted 25 Days Ago
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NPI Engineer, Chip
NVIDIA Corporation - Israel, YokneamIndexed from Workday Benefit evidence checked Jun 13, 2026posted 82 days agoWhy we showed this
Role: semantic matchUnspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedNPI Engineer, Chip Israel, Yokneam posted: Posted 11 Days Ago
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Car OEM Sales Leader
NXP Semiconductors - Shanghai (JingAn)Indexed from Workday Benefit evidence checked May 7, 2026posted 102 days agoWhy we showed this
Employer: "nxp"Employer: "semiconductors"Unspecified Engineering From the posting source - Mid From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedCar OEM Sales Leader Shanghai (JingAn) posted: Posted 30+ Days Ago
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ASIC Engineering Digital Designer/ Leader ( digital design, FSM, CPU sub-systems, complex SOCs, FPGA validation | 8-12 Years | Pune)
ThousandEyes - Pune, IndiaIndexed from Phenom Peopleposted 93 days agoWhy we showed this
Role: semantic matchUnspecified Engineering From the posting source - Senior From the posting source Salary not disclosedASIC Engineering Digital Designer/ Leader ( digital design, FSM, CPU sub-systems, complex SOCs, FPGA validation | 8-12 Years | Pune) Pune, India Join our team as a Senior Digital Design Lead and drive the development of advanced digital logic for high-speed optical interconnects. Lead technical strategy, manage the full ASIC/SoC lifecycle, and collaborate with cross-functional teams to deliver cutting-edge solutions for next-generation data center networking. Shape the future of optical technology with us.
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Senior Firmware Engineer - PCIe/CXL Memory Solutions
Astera Labs - San Jose, California, United StatesIndexed from Greenhouse Benefit evidence checked Jun 7, 2026 Comp disclosed in postingposted 104 days agoWhy we showed this
Role: semantic matchUnspecified Engineering From the posting source - Senior From the posting source $147K-$165K From the posting source Equity Inferred from posting 401(k) reportedSenior Firmware Engineer - PCIe/CXL Memory Solutions San Jose, California, United States Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Astera Labs is seeking experienced Senior Firmware Engineer PCIe/CXL Memory Solution to lead the design and development of embedded firmware for cutting-edge PCIe/CXL memory expansion products tailored for AI and Cloud infrastructure. This role is pivotal in enabling next-generation memory devices that power high-performance computing platforms. This position will be required onsite. Required Experience: - Bachelor's degree in Electrical Engineering, Computer Science, or a related technical field. - 5+ years of hands-on experience in embedded firmware development using C. - Deep expertise in low-level firmware for hardware bring-up, traffic enablement, and RAS (Reliability, Availability, Serviceability) feature implementation. - Proven track record working with high-speed interfaces and protocols such as PCIe, CXL, DDR, and I2C. - Hands on experience in CPU to Device, Device to Device flows like MMIO, DMA, PCIe P2P. Key Responsibilities & Skills: - Firmware development, bring-up, and validation of PCIe/CXL/DDR interfaces at
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Functional Safety Software Developer
NXP Semiconductors - 2 LocationsIndexed from Workday Benefit evidence checked May 7, 2026posted 89 days agoWhy we showed this
Employer: "semiconductors"Employer: "nxp"Unspecified Engineering From the posting source - Mid From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedFunctional Safety Software Developer 2 Locations posted: Posted 18 Days Ago
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Trade Compliance Operations Manager
NXP Semiconductors - Kuala LumpurIndexed from Workday Benefit evidence checked May 7, 2026posted 102 days agoWhy we showed this
Employer: "nxp"Employer: "semiconductors"Unspecified Finance From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedTrade Compliance Operations Manager Kuala Lumpur posted: Posted 30+ Days Ago
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ASIC Layout Engineer - Analog, High speed IP - 8 to 11 years - Bangalore
ThousandEyes - Bangalore, IndiaIndexed from Phenom Peopleposted 100 days agoWhy we showed this
Role: semantic matchASIC Layout Engineer - Analog, High speed IP - 8 to 11 years - Bangalore Bangalore, India Embrace the role of an Asic Layout Engineer and lead the design and implementation of high-performance analog and mixed-signal circuits for next-generation optical interconnect solutions. Collaborate with multidisciplinary teams, drive layout innovation, and support advanced manufacturing processes in a dynamic, growth-focused environment. Shape the future of high-speed electronics with Cisco.
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Internship: Human Resources (HR) (m/f/d)
NXP Semiconductors - GratkornIndexed from Workday Benefit evidence checked May 7, 2026posted 102 days agoWhy we showed this
Employer: "nxp"Employer: "semiconductors"Unspecified Hr From the posting source - Entry From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedInternship: Human Resources (HR) (m/f/d) Gratkorn posted: Posted 30+ Days Ago
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Design Verification Engineer (Einfochips)
Arrow Electronics - Austin, Texas, United States of AmericaIndexed from Phenom People Benefit evidence checked Jun 7, 2026posted 87 days agoWhy we showed this
Role: semantic matchUnspecified Engineering From the posting source - Senior From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedDesign Verification Engineer (Einfochips) Austin, Texas, United States of America Join our team as a Senior Design Verification Engineer and drive innovation in semiconductor design. Leverage your expertise in System Verilog HVL, C++, and UVM to ensure robust, high-quality designs. Collaborate with cross-functional teams and play a key role in testing, debugging, and integration for cutting-edge products. Grow your career with us in a dynamic, global environment.
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Engineer Electronics
Northrop Grumman Corporation - United States-Illinois-Rolling MeadowsIndexed from Eightfold Benefit evidence checked Jun 7, 2026posted 71 days agoWhy we showed this
Role: semantic matchUnspecified Data From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedEngineer Electronics United States-Illinois-Rolling Meadows
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Device Engineer
STMicroelectronics - SingaporeIndexed from Eightfold Benefit evidence checked Jun 7, 2026posted 71 days agoWhy we showed this
Role: semantic matchUnspecified Data From the posting source - Mid From the posting source Salary not disclosed Inferred from posting 401(k) reportedDevice Engineer Singapore
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Test Operations Strategy Manager
NXP Semiconductors - 7 LocationsIndexed from Workday Benefit evidence checked May 7, 2026posted 73 days agoWhy we showed this
Employer: "nxp"Employer: "semiconductors"Unspecified Product From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedTest Operations Strategy Manager 7 Locations posted: Posted 2 Days Ago
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Semiconductor Facilities Technician
Intel - US, New Mexico, AlbuquerqueIndexed from Workday Benefit evidence checked Jun 13, 2026posted 75 days agoWhy we showed this
Role: semantic matchUnspecified Engineering From the posting source - Mid From the posting source Salary not disclosed Equity Inferred from posting 401(k) reportedSemiconductor Facilities Technician US, New Mexico, Albuquerque posted: Posted 4 Days Ago
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AAES Tools Software Development Engineer
NXP Semiconductors - BucharestIndexed from Workday Benefit evidence checked May 7, 2026posted 73 days agoWhy we showed this
Employer: "semiconductors"Employer: "nxp"Unspecified Data From the posting source - Mid From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedAAES Tools Software Development Engineer Bucharest posted: Posted 2 Days Ago
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Principal Electrical Engineer – DSP ASIC/FPGA (Onsite)
Raytheon Technologies - US-IA-CEDAR RAPIDS-166 ~ 855 35Th St NE ~ BLDG 166Indexed from Workday Benefit evidence checked May 7, 2026posted 85 days agoWhy we showed this
Role: semantic matchOnsite - 5d office From the posting source Data From the posting source - Staff Plus From the posting source Resolvable source Verified parental leave: 4 wksource Resolvable source Verified non-birth-parent leave: 4 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedPrincipal Electrical Engineer – DSP ASIC/FPGA (Onsite) US-IA-CEDAR RAPIDS-166 ~ 855 35Th St NE ~ BLDG 166 posted: Posted 14 Days Ago
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Touch Sensor Hardware Engineer, Consumer Hardware
Google - New Taipei, Banqiao District, New Taipei City, TaiwanIndexed from Google Custom Benefit evidence checked May 7, 2026posted 80 days agoWhy we showed this
Role: semantic matchUnspecified Engineering From the posting source - Mid From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedTouch Sensor Hardware Engineer, Consumer Hardware New Taipei, Banqiao District, New Taipei City, Taiwan Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Lead the development and integration of on-cell touch solutions, focusing on the interaction between touch sensors and Thin Film Encapsulation (TFE) for plastic Organic Light Emitting Diode (OLED). Partner with vendors to optimize Touch IC architecture (Analog Front End (AFE)/Microcontroller Unit (MCU)) and firmware algorithms to ensure high-levels of noise immunity and system performance. Define Engineering Requirements Specifications (ERS) and execute validation plans, including testing during early-stage development (Proto/EVT) and deep-dive failure analysis on complex modes. Manage technical dependencies between display driving and touch sensing to mitigate noise interference and ensure signal integrity in high-proximity architectures. Oversee physical engineering design layouts and manage display/touch vendors to ensure quality and perform root cause diagnosis for system-level issues during high-volume production ramps. Minimum qualifications: Bachelor's degree in Electrical Engineering, Physics, Materials Science, or a related field or equivalent practical experience. 2 years of experience in touch sensor module development, including
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NPI Program Manager - Automotive Processors
NXP Semiconductors - 2 LocationsIndexed from Workday Benefit evidence checked May 7, 2026posted 72 days agoWhy we showed this
Employer: "nxp"Employer: "semiconductors"Unspecified Trades From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reportedNPI Program Manager - Automotive Processors 2 Locations posted: Posted Yesterday
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Senior Analog/mixed-signal IC Developer - Acacia (Hybrid)
ThousandEyes - Ottawa, Ontario, CanadaIndexed from Phenom Peopleposted 144 days agoWhy we showed this
Role: semantic matchHybrid - 2d office From the posting source Engineering From the posting source - Senior From the posting source Salary not disclosedSenior Analog/mixed-signal IC Developer - Acacia (Hybrid) Ottawa, Ontario, Canada Join our team as a Hardware Technical Leader, where you will drive innovation and lead complex hardware projects. If you have a passion for developing next-generation technology and a proven track record in hardware engineering, we want to hear from you!
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